Patent
Low GM transconductor
| العنوان: | Low GM transconductor |
|---|---|
| Patent Number: | 8,841,970 |
| تاريخ النشر: | September 23, 2014 |
| Appl. No: | 13/427785 |
| Application Filed: | March 22, 2012 |
| مستخلص: | Techniques for designing a transconductor configurable to have a low transconductance. In one aspect, a voltage to current conversion module is coupled to a 1:N current replication module. The voltage to current conversion module may be implemented as an operational amplifier configured with negative feedback to generate a current through a transistor, wherein such current is proportional to the difference between an input voltage and a common-mode reference. The 1:N current replication module is configured to mirror the generated current in another transistor, to a predetermined ratio, such that the output current is also proportional to the difference between the input voltage and the common-mode reference. In exemplary embodiments, the output stage driving the output current may be configured to operate as a Class A, Class B, or Class AB type amplifier. |
| Inventors: | Mehrabi, Arash (San Diego, CA, US); Deyerle, IV, Thurman S. (Midlothian, VA, US); Miao, Guoqing (San Diego, CA, US) |
| Assignees: | QUALCOMM Incorporated (San Diego, CA, US) |
| Claim: | 1. An apparatus comprising: an operational amplifier configured to set a gate voltage of an input transistor to generate a current, the current comprising a component proportional to an input voltage minus a reference voltage; a resistor coupling the input voltage to an input of the operational amplifier, the resistance of the resistor defining the proportionality between the component current and the input voltage minus the reference voltage; and a current replication module configured to replicate the current at a 1:N ratio to generate a transconductance current proportional to the input voltage, the current replication module comprising: a first transistor having a predetermined size ratio relative to the input transistor, the gate voltage of the input transistor being coupled to the gate voltage of the first transistor; the transconductance current being derived from the drain current of the first transistor; and the current of the input transistor further comprising an input bias current, the first transistor being biased by a first bias current, the first bias current having the same predetermined size ratio relative to the input bias current as the first transistor has relative to the input transistor. |
| Claim: | 2. An apparatus comprising: a voltage to current conversion module configured to convert an input voltage to a current, the voltage to current conversion module comprising: an operational amplifier configured to set a gate voltage of an input transistor to generate the current, the current comprising a component proportional to the input voltage minus a reference voltage; and a resistor coupling the input voltage to an input of the operational amplifier, the resistance of the resistor defining the proportionality between the component current and the input voltage minus the reference voltage; the apparatus further comprising: a current replication module configured to replicate the converted current at a 1:N ratio to generate a transconductance current proportional to the input voltage, the current replication module comprising: a first transistor having a predetermined size ratio relative to the input transistor, the gate voltage of the input transistor being coupled to the gate voltage of the first transistor; the transconductance current being derived from the drain current of the first transistor; wherein the reference voltage is a ground voltage. |
| Claim: | 3. The apparatus of claim 1 , wherein the reference voltage is a common-mode voltage, the apparatus further comprising: a complementary operational amplifier configured to set a gate voltage of a complementary input transistor to generate a current, the current comprising a component proportional to a complementary input voltage minus the common-mode voltage; and a complementary first transistor having a predetermined size ratio relative to the complementary input transistor, the gate voltage of the complementary input transistor being coupled to the gate voltage of the first complementary transistor. |
| Claim: | 4. The apparatus of claim 1 , the drain of the input transistor coupled to the input voltage via the resistor at a reference node, the reference node further coupled to a positive differential input of the operational amplifier. |
| Claim: | 5. The apparatus of claim 1 , the current replication module further comprising: a second transistor coupled to the drain of the first transistor in parallel with a current source generating the first bias current; and a first output transistor having a gate voltage coupled to the gate voltage of the second transistor, the transconductance current being derived from the drain current of the first output transistor. |
| Claim: | 6. The apparatus of claim 5 , the current replication module further comprising: a third transistor having a gate voltage coupled to the gate voltage of the first transistor, the third transistor being biased by a third bias current; a fourth transistor coupled to the drain of the third transistor in parallel with a current source generating the third bias current; and a second output transistor having a gate voltage coupled to the gate voltage of the fourth transistor, wherein the transconductance current is further derived from the drain current of the second output transistor. |
| Claim: | 7. The apparatus of claim 1 , the gate voltage of the first input transistor further coupled to the gate of a second input transistor via a voltage level-shifter; the current replication module further comprising: a second transistor having a predetermined size ratio relative to the second input transistor, the gate of the second input transistor being coupled to the gate of the second transistor; wherein the drains of the first and second transistors are coupled to each other, and the transconductance current is derived from the drains of the first and second transistors. |
| Claim: | 8. The apparatus of claim 7 , further comprising: a complementary operational amplifier configured to set a gate voltage of a first complementary input transistor to generate a current, the current comprising a component proportional to a complementary input voltage minus the reference voltage, the gate voltage of the first complementary input transistor further coupled to the gate of a second complementary input transistor via a voltage level-shifter; the current replication module further comprising: a first complementary transistor having a predetermined size ratio relative to the first complementary input transistor, the gate of the first complementary input transistor being coupled to the gate of the first complementary transistor; a second complementary transistor having a predetermined size ratio relative to the second complementary input transistor, the gate of the second complementary input transistor being coupled to the gate of the second complementary transistor; wherein the drains of the first and second complementary transistors are coupled together, and a complementary transconductance current is derived from the drains of the first and second complementary transistors. |
| Claim: | 9. The apparatus of claim 1 , further comprising: a second voltage to current conversion module configured to convert a second input voltage to a second current; a second current replication module configured to replicate the second converted current at a 1:N ratio to generate a second transconductance current proportional to the input voltage; an op amp having positive and negative input terminals and positive and negative output terminals; a first feedback capacitor coupled in parallel with a first transconductance current to couple the negative output terminal to the positive input terminal, wherein the input voltage corresponds to the voltage across the first feedback capacitor, and wherein the first transconductance current corresponds to the generated transconductance current proportional to the input voltage; a second feedback capacitor coupled in parallel with the second transconductance current to couple the positive output terminal to the negative input terminal, wherein the second input voltage corresponds to the voltage across the second feedback capacitor; and first and second input capacitors coupling the positive and negative input terminals, respectively, to positive and negative input voltages, respectively. |
| Claim: | 10. An apparatus comprising: means for converting an input voltage Vin to an intermediate current using an input transistor having a drain coupled to the input voltage via a resistor; and means for replicating the intermediate current at a 1:N ratio to generate the transconductance current proportional to the input voltage the means for replicating comprising means for coupling the gate voltage of the input transistor to a first transistor to generate a transconductance current proportional to the input voltage minus a reference voltage; and means for generating proportional bias currents for the means for converting and the means for replicating. |
| Claim: | 11. The apparatus of claim 10 , the means for replicating further comprising means for replicating the intermediate current using a class A driving scheme. |
| Claim: | 12. The apparatus of claim 10 , the means for replicating further comprising means for replicating the intermediate current using a class B driving scheme. |
| Claim: | 13. The apparatus of claim 10 , the means for replicating further comprising means for replicating the intermediate current using a class AB driving scheme. |
| Claim: | 14. A method comprising: converting an input voltage Vin to an intermediate current, the converting the input voltage comprising: configuring a gate voltage of an input transistor to generate a drain current, wherein the drain current of the input transistor is proportional to the difference between the input voltage and a common-mode reference voltage; and coupling the input voltage to a drain of the input transistor using a resistor; the method further comprising: replicating the intermediate current at a 1:N ratio to generate a transconductance current proportional to the input voltage, the replicating the intermediate current comprising: generating the transconductance current using at least a first transistor having a predetermined size ratio relative to the input transistor, the gate voltage of the input transistor being coupled to the gate voltage of the first transistor; the method further comprising coupling an input bias current to the drain of the input transistor, wherein the input drain current corresponds to the sum of the input bias current and a signal current proportional to the difference between the input voltage and a common-mode reference voltage. |
| Claim: | 15. The method of claim 14 , the converting the input voltage further comprising: configuring a gate voltage of an input transistor to generate a drain current, wherein the drain current of the input transistor is a function of the difference between the input voltage and a common-mode reference voltage; and the replicating the intermediate current comprising: coupling the gate voltage of the input transistor to the gate voltage of a first transistor, the first transistor having a first predetermined size ratio relative to the input transistor; biasing the first transistor using a first bias current, wherein a first signal current corresponds to the difference between the first bias current and the drain current of the first transistor; coupling the gate voltage of the input transistor to the gate voltage of a second transistor, the second transistor having a second predetermined size ratio relative to the input transistor; biasing the second transistor using a second bias current, wherein a second signal current corresponds to the difference between the second bias current and the drain current of the second transistor; and combining a current corresponding to the first signal current with a current corresponding to the second signal current to generate the transconductance current. |
| Claim: | 16. The method of claim 14 , further comprising: converting a second voltage to a second intermediate current; replicating the second intermediate current at a 1:N ratio to generate a second transconductance current proportional to the second voltage; coupling a first transconductance current in parallel with a first capacitor, the first transconductance current and first capacitor coupling a negative output node of an operational amplifier (op amp) to a positive input node of the op amp, the positive input node of the op amp coupled to a first input voltage via a capacitor, wherein the first transconductance current corresponds to the generated transconductance current proportional to the input voltage; and coupling the second transconductance current in parallel with a second capacitor, the second transconductance current and second capacitor coupling a positive output node of the op amp to a negative input node of the op amp, the negative input node of the op amp coupled to a second input voltage via a capacitor. |
| Current U.S. Class: | 330/288 |
| Patent References Cited: | 4689607 August 1987 Robinson 5241227 August 1993 Jung et al. 6727757 April 2004 Venkatraman et al. 7113044 September 2006 Wang 7142056 November 2006 Blecker et al. 7250819 July 2007 Kelly et al. 7656230 February 2010 Fagg 2002/0089377 July 2002 Hwang 2006/0055465 March 2006 Lin et al. 2007/0057660 March 2007 Lin |
| Other References: | International Search Report and Written Opinion—PCT/US2013/033482, International Search Authority—European Patent Office, Nov. 28, 2013. cited by applicant Partial International Search Report—PCT/US2013/033482—ISA/EPO—Sep. 11, 2013. cited by applicant |
| Primary Examiner: | Mottola, Steven J |
| Attorney, Agent or Firm: | Mobarhan, Ramin |
| رقم الانضمام: | edspgr.08841970 |
| قاعدة البيانات: | USPTO Patent Grants |
| الوصف غير متاح. |