Patent
Method for fabricating semiconductor device using a double patterning process
| العنوان: | Method for fabricating semiconductor device using a double patterning process |
|---|---|
| Patent Number: | 8,308,966 |
| تاريخ النشر: | November 13, 2012 |
| Appl. No: | 12/495196 |
| Application Filed: | June 30, 2009 |
| مستخلص: | A method for performing a double pattering process of a semiconductor device is provided. The method includes forming a hard mask layer having a stack structure of a first layer, a second layer and a third layer in sequence, forming a first photoresist pattern over the hard mask layer, etching the third layer to form third layer patterns by using the first photoresist pattern as an etch barrier, forming a second photoresist pattern over the third layer patterns, etching the second layer to form second layer patterns by using the second photoresist pattern and the third layer patterns as an etch barrier, removing the second photoresist pattern, and etching the first layer to form first layer patterns by using the second layer patterns as an etch barrier. |
| Inventors: | Sun, Jun-Hyeub (Gyeonggi-do, KR); Lee, Shi-Young (Gyeonggi-do, KR); Bang, Jong-Sik (Gyeonggi-do, KR); Ju, Sang-Min (Gyeonggi-do, KR) |
| Assignees: | Hynix Semiconductor, Inc. (Gyeonggi-do, KR) |
| Claim: | 1. A method for performing a double patterning process of a semiconductor device, the method comprising: forming a hard mask layer having a stack structure of a first layer, a second layer formed over the first layer, and a third layer formed over the second layer in sequence; forming a first photoresist pattern over the hard mask layer; etching the third layer to form third layer patterns by using the first photoresist pattern as an etch barrier; forming a second photoresist pattern over the third layer patterns, wherein the first photoresist pattern and the second photoresist pattern form lines that orthogonally cross each other; etching the second layer to form second layer patterns by using the second photoresist pattern and the third layer patterns as an etch barrier; removing the second photoresist pattern; and etching the first layer to form first layer patterns by using only the second layer patterns as an etch barrier so that the first layer patterns have hole patterns, wherein the first layer and third layer are formed of the same material and the second layer is formed of a material having an etch selectivity with respect to the first and third layers. |
| Claim: | 2. The method of claim 1 wherein the forming of the second photoresist pattern is performed by a photolithography process with a slant angle symmetrical with a slant angle of a photolithography process for forming the first photoresist pattern. |
| Claim: | 3. The method of claim 1 , wherein the second layer is formed of a material having an etch selectivity which is greater than or lower than that of the first and third layers. |
| Claim: | 4. The method of claim 1 , wherein the first and third layers include an oxide layer and the second layer includes a nitride layer. |
| Claim: | 5. The method of claim 1 , wherein the first and third layers include a nitride layer and the second layer includes an oxide layer, a polysilicon layer or an amorphous carbon layer. |
| Claim: | 6. The method of claim 4 , wherein the oxide layer includes a silicon oxide layer and the nitride layer includes a silicon nitride (SiN) layer or a silicon oxynitride (SiON) layer. |
| Claim: | 7. The method of claim 6 , wherein the silicon oxide layer includes a plasma enhanced tetra ethyl ortho silicate (PETEOS) layer. |
| Claim: | 8. The method of claim 1 , wherein the first and third layers include an oxide layer and the second layer includes a polysilicon layer or an amorphous carbon layer. |
| Claim: | 9. The method of claim 1 , wherein the etching of the third and second layers is performed by using a power ranging between approximately 1 W and approximately 500 W. |
| Claim: | 10. The method of claim 1 , wherein the etching of the third and second layers is performed by using a transformer coupled plasma (TCP) type plasma source or inductively coupled plasma (ICP) type plasma source. |
| Claim: | 11. A method for fabricating a semiconductor device, the method comprising: forming an amorphous carbon layer over an etch target layer; forming a hard mask layer having a stack structure of a first layer, a second layer formed over the first layer, and a third layer formed over the second layer in sequence over the amorphous carbon layer; forming a first photoresist pattern over the third layer; etching the third layer to form third layer patterns by using the first photoresist pattern as an etch barrier; forming a second photoresist pattern over the third layer patterns, wherein the first photoresist pattern and the second photoresist pattern form lines that orthogonally cross each other; etching the second layer to form second layer patterns by using the second photoresist pattern and the third layer patterns as an etch barrier; removing the second photoresist pattern; etching the first layer to form first layer patterns by using only the second layer patterns as an etch barrier so that the first layer patterns have hole patterns; etching the amorphous carbon layer to form amorphous carbon patterns by using the first layer patterns as an etch barrier; and etching the etch target layer to form patterns by using the amorphous carbon patterns as an etch barrier, wherein the first layer and the third layer are formed of the same material and the second layer is formed of a material having an etch selectivity with respect to the first and third layers. |
| Claim: | 12. The method of claim 11 , after removing the second photoresist pattern, further comprising, performing a wet cleaning process. |
| Claim: | 13. The method of claim 11 , wherein the forming of the second photoresist pattern is performed by a photolithography process with a slant angle symmetrical with a slant angle of a photolithography process for forming the first photoresist pattern. |
| Claim: | 14. The method of claim 11 , wherein the second layer is formed of a material having an etch selectivity which is greater than or lower than that of the first and third layers. |
| Claim: | 15. The method of claim 11 , wherein the first and third layers include an oxide layer and the second layer includes a nitride layer. |
| Claim: | 16. The method of claim 11 , wherein the first and third layers include a nitride layer and the second layer includes an oxide layer, a polysilicon layer or an amorphous carbon layer. |
| Claim: | 17. The method of claim 15 , wherein the oxide layer includes a silicon oxide layer and the nitride layer includes a silicon nitride (SiN) layer or a silicon oxynitride (SiON) layer. |
| Claim: | 18. The method of claim 17 , wherein the silicon oxide layer includes a PETEOS layer. |
| Claim: | 19. The method of claim 11 , wherein the first and third layers include an oxide layer and the second layer includes a polysilicon layer or an amorphous carbon layer. |
| Claim: | 20. The method of claim 11 , wherein the etching of the third and second layers is performed by using a low bias power ranging between approximately 1 W and approximately 500 W. |
| Claim: | 21. The method of claim 11 , wherein the etching of the third and second layers is performed by using a TCP type plasma source or ICP type plasma source. |
| Claim: | 22. The method of claim 16 , wherein the etching of the third layer is performed by using a tetrafluoromethane (CF 4) gas as a main etch gas and additionally adding a fluoroform (CHF 3) gas, the etching of the second layer is performed by using a hexafluorobutadiene (C 4 F 6) gas or an octafluorocyclobutane (C 4 F 8) gas as a main etch gas and additionally adding an oxide (O 2) gas, and the etching of the first layer is performed by using one selected form a group consisting of a difluoromethane (CH 2 F 2) gas, CHF 3 gas and sulfur hexafluoride (SF 6) gas. |
| Claim: | 23. The method of claim 15 , wherein the etching of the third layer is performed by using a CF 4 gas or using a gas mixture of a C 4 F 8 gas and O 2 gas, the etching of the second layer is performed by using one selected from a group consisting of a CH 2 F 2 gas, a CHF 3 gas and a SF 6 gas, and the etching of the first layer is performed by using a C 4 F 6 gas or C 4 F 8 gas. |
| Claim: | 24. The method of claim 11 , wherein the patterns formed by etching the etch target layer include contact holes. |
| Current U.S. Class: | 216/47 |
| Patent References Cited: | 2004/0203223 October 2004 Guo et al. 2007/0111467 May 2007 Kim 2008/0124931 May 2008 Lee et al. 1020050123335 December 2005 1020070122050 December 2007 100819673 April 2008 1020090016843 February 2009 |
| Other References: | Notice of Allowance issued from Korean Intellectual Property Office on Sep. 1, 2011. cited by other Notice of Preliminary Rejection issued from Korean Intellectual Property Office on Jan. 20, 2011. cited by other |
| Primary Examiner: | Ahmed, Shamim |
| Attorney, Agent or Firm: | IP & T Group LLP |
| رقم الانضمام: | edspgr.08308966 |
| قاعدة البيانات: | USPTO Patent Grants |
| الوصف غير متاح. |