Patent
Method of manufacturing semiconductor device
| العنوان: | Method of manufacturing semiconductor device |
|---|---|
| Patent Number: | 8,158,509 |
| تاريخ النشر: | April 17, 2012 |
| Appl. No: | 12/654792 |
| Application Filed: | January 04, 2010 |
| مستخلص: | A method of manufacturing a semiconductor device is disclosed which comprises forming a gate structure on a major surface of a semiconductor substrate with a gate insulating film interposed therebetween, forming a first insulating film to cover top and side surfaces of the gate structure and the major surface of the semiconductor substrate, reforming portions of the first insulating film which cover the top surface of the gate structure and the major surface of the semiconductor substrate by an anisotropic plasma process using a gas not containing fluorine, and removing the reformed portions of the first insulating film. |
| Inventors: | Omura, Mitsuhiro (Kawasaki, JP); Yasutake, Nobuaki (Yokohama, JP) |
| Assignees: | Kabushiki Kaisha Toshiba (Tokyo, JP) |
| Claim: | 1. A method of manufacturing a semiconductor device comprising: forming a conducting portion containing metal on or above a semiconductor substrate; forming a first insulating film on the conducting portion; forming a second insulating film on the first insulating film; removing a portion of the second insulating film to expose a portion of the first insulating film and reduce a thickness of the first insulating film; reforming the exposed portion of the first insulating film by an anisotropic plasma process using a gas not containing fluorine; and removing the reformed portion of the first insulating film by a wet process. |
| Claim: | 2. The method according to claim 1 , wherein reforming the exposed portion of the first insulating film includes oxidizing, nitriding, or damaging the exposed portion of the first insulating film. |
| Claim: | 3. The method according to claim 1 , wherein the first insulating film is formed of silicon nitride, and reforming the exposed portion of the first insulating film includes introducing oxygen into the exposed portion of the first insulating film. |
| Claim: | 4. The method according to claim 1 , wherein the first insulating film is formed of silicon nitride, and reforming the exposed portion of the first insulating film includes introducing hydrogen into the exposed portion of the first insulating film. |
| Claim: | 5. The method according to claim 1 , wherein reforming the exposed portion of the first insulating film includes controlling a plasma power in the anisotropic plasma process to form a reformed layer having a desired depth. |
| Claim: | 6. The method according to claim 1 , wherein the first insulating film functions as an etching stopper in removing the portion of the second insulating film. |
| Current U.S. Class: | 438/622 |
| Patent References Cited: | 5484749 January 1996 Maeda et al. 6104063 August 2000 Fulford, Jr. et al. 6225236 May 2001 Nishimoto et al. 6429084 August 2002 Park et al. 6465888 October 2002 Chooi et al. 6869839 March 2005 Lee et al. 2002/0160592 October 2002 Sohn 2003/0111735 June 2003 Lee 59-27528 February 1984 60-210876 October 1985 2000-31267 January 2000 2003-234325 August 2003 2004-71973 March 2004 |
| Other References: | A Reasons for Rejection mailed by the Japanese Patent Office on Jul. 21, 2009, for Japanese Application No. 2005-186853, and English-language translation thereof. cited by other Hokazono et al., “14 mm Gate Length CMOSFETs Utilizing Low Thermal Budget Process with Poly-SiGe and Ni Salicide”, IEDM Tech. Dig., 957, pp. 639-642, (2002). cited by other |
| Primary Examiner: | Trinh, Michael |
| Attorney, Agent or Firm: | Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P. |
| رقم الانضمام: | edspgr.08158509 |
| قاعدة البيانات: | USPTO Patent Grants |
| الوصف غير متاح. |