Patent
Liquid crystal display and method of fabricating the same
| العنوان: | Liquid crystal display and method of fabricating the same |
|---|---|
| Patent Number: | 8,085,368 |
| تاريخ النشر: | December 27, 2011 |
| Appl. No: | 12/684150 |
| Application Filed: | January 08, 2010 |
| مستخلص: | A liquid crystal display and a simple method to fabricate the same are provided, which can accurately measure luminance of an external light. The liquid crystal display includes a substrate; a thin film transistor array formed on the substrate; and a photoelectric conversion element having a reflection pattern formed on at least one side of the substrate, a photoelectric conversion region provided with a first semiconductor region formed on an upper part of the reflection pattern to receive an external light reflected by the reflection pattern, and a dummy pattern formed on an upper part of the photoelectric conversion region with a width corresponding to the first semiconductor region. The photoelectric conversion region may be configured to adjust the quantity of light incident to the thin film transistor array. |
| Inventors: | Kim, Soon-Dong (Pyeongtaek-si, KR); Tae, Seung-Gyu (Osan-si, KR); Chung, Se-Jin (Yongin-si, KR); Moon, Jun-Hee (Yongin-si, KR); Lee, Myung-Woo (Hwaseong-si, KR) |
| Assignees: | Samsung Electronics Co., Ltd. (Suwon-si, KR) |
| Claim: | 1. A liquid crystal display, comprising: a substrate; a thin film transistor array disposed on the substrate; and a photoelectric conversion element comprising: a reflection pattern disposed on at least one side of the substrate; a photoelectric conversion region provided with a first semiconductor region disposed on an upper part of the reflection pattern, the photoelectric conversion region to receive an external light reflected by the reflection pattern; and a dummy pattern disposed on an upper part of the photoelectric conversion region, the dummy pattern having a width corresponding to the first semiconductor region, and to adjust a quantity of the external light incident to the thin film transistor array. |
| Claim: | 2. The liquid crystal display of claim 1 , wherein the thin film transistor array comprises a plurality of thin film transistors having gate interconnections, and wherein the dummy pattern is comprised of the same material as the gate interconnections. |
| Claim: | 3. The liquid crystal display of claim 1 , wherein the photoelectric conversion region further comprises a second semiconductor region and a third semiconductor region having polarities opposite to each other, the second semiconductor region and the third semiconductor region being disposed on opposite sides of the first semiconductor region. |
| Claim: | 4. The liquid crystal display of claim 3 , wherein the first, second, and third semiconductor regions comprise polysilicon, and the second and third semiconductor regions are doped with P-type and N-type impurities, respectively. |
| Claim: | 5. The liquid crystal display of claim 3 , further comprising a first interconnection pattern and a second interconnection pattern contacting the second semiconductor region and the third semiconductor region, respectively, to connect the second semiconductor region and the third semiconductor region to an external circuit. |
| Claim: | 6. The liquid crystal display of claim 5 , wherein a width of a gap between the first interconnection pattern and the second interconnection pattern is not less than twice a channel length of the first semiconductor region and not more than 10 times the channel length. |
| Claim: | 7. The liquid crystal display of claim 3 , wherein the reflection pattern comprises a recessed part overlapping the first semiconductor region. |
| Claim: | 8. The liquid crystal display of claim 7 , wherein the recessed part comprises a tilted surface having a thickness that is gradually reduced. |
| Claim: | 9. The liquid crystal display of claim 7 , further comprising a trench formed in the substrate, the recessed part being formed in the trench. |
| Claim: | 10. A method of fabricating a liquid crystal display, comprising: forming a thin film transistor array on a substrate; forming a photoelectric conversion element having a reflection pattern disposed on at least one side of the substrate; forming a photoelectric conversion region comprising a first semiconductor region disposed on an upper part of the reflection pattern to receive an external light reflected by the reflection pattern; forming a dummy pattern on an upper part of the photoelectric conversion region, the dummy pattern having a width corresponding to the first semiconductor region; and detecting a quantity of the external light incident to the thin film transistor array. |
| Claim: | 11. The method of claim 10 , wherein forming the thin film transistor array comprises forming a gate interconnection on the substrate, and wherein forming the dummy pattern and the gate interconnection comprises: forming a conductive film to implement the gate interconnection on the substrate; and forming, simultaneously, the dummy pattern and the gate interconnection by patterning the conductive film. |
| Claim: | 12. The method of claim 11 , wherein forming the photoelectric conversion element comprises: forming a blocking film on the reflection pattern, the blocking film overlapping the reflection pattern; and forming a preliminary photoelectric conversion region made of polysilicon on the blocking film. |
| Claim: | 13. The method of claim 12 , wherein forming the photoelectric conversion region further comprises: forming the first semiconductor region corresponding to the dummy pattern; and forming a second semiconductor region and a third semiconductor region having polarities opposite to each other in the photoelectric conversion region, the second and third semiconductor regions being disposed on opposite sides of the first semiconductor region by injecting impurities having polarities opposite to each other onto the preliminary photoelectric conversion region positioned on opposite sides of the dummy pattern. |
| Claim: | 14. The method of claim 13 , further comprising: forming a first gate insulating film to cover the preliminary photoelectric conversion region on the substrate before forming the dummy pattern and after forming the preliminary photoelectric conversion region; forming a second gate insulating film to cover the dummy pattern after forming the dummy pattern; and forming a first interconnection pattern and a second interconnection pattern contacting the second and third semiconductor regions through the first and second gate insulating films, respectively. |
| Claim: | 15. The method of claim 14 , wherein forming first and second interconnection patterns comprises forming a gap between the first and second interconnection patterns, a width of the gap being not less than twice a width of the first semiconductor region, and not more than 10 times the width of the first semiconductor region. |
| Claim: | 16. The method of claim 10 , wherein forming the photoelectric conversion region further comprises forming a second semiconductor region and a third semiconductor region having polarities opposite to each other, the second and third semiconductor regions being disposed on opposite sides of the first semiconductor regions, and wherein forming the reflection pattern on at least one side of the substrate comprises: forming a metal film for the reflection pattern on the substrate; and forming a recessed region overlapping the first semiconductor region by patterning the metal film. |
| Claim: | 17. The method of claim 16 , wherein patterning the metal film comprises: forming a tilted surface; and reducing, gradually, a thickness of the tilted surface by patterning the metal layer. |
| Claim: | 18. The method of claim 10 , further comprising forming a trench in the substrate, and wherein forming the reflection pattern comprises conformally forming a metal layer for the reflection pattern on a surface of the substrate and in the trench. |
| Current U.S. Class: | 349/116 |
| Patent References Cited: | 6243155 June 2001 Zhang et al. 2010/0165267 July 2010 Yoshida et al. |
| Primary Examiner: | Vu, Phu |
| Attorney, Agent or Firm: | H.C. Park & Associates, PLC |
| رقم الانضمام: | edspgr.08085368 |
| قاعدة البيانات: | USPTO Patent Grants |
| الوصف غير متاح. |