Patent
Method for fabricating a spacer layer for a magnetoresistive element
| العنوان: | Method for fabricating a spacer layer for a magnetoresistive element |
|---|---|
| Patent Number: | 7,595,967 |
| تاريخ النشر: | September 29, 2009 |
| Appl. No: | 10/936172 |
| Application Filed: | September 07, 2004 |
| مستخلص: | A method and system for manufacturing a spacer layer in a magnetoresistive element are described. The spacer layer resides between a free layer and a pinned layer. The method and system include providing a first metallic layer and oxidizing the first metallic layer in a first environment including at least oxygen and a first gas inert with respect to the first metallic layer. The method and system further include providing a second metallic layer and oxidizing the second metallic layer in a second environment including at least oxygen and a first gas inert with respect to the first metallic layer. |
| Inventors: | Moon, Ki-Seok (Pleasanton, CA, US); Park, Chang-Man (Mountain View, CA, US) |
| Assignees: | Western Digital (Fremont), LLP (Fremont, CA, US) |
| Claim: | 1. A method for manufacturing a spacer layer in a magnetoresistive element, the spacer layer residing between a free layer and a pinned layer, comprising; providing a first metallic layer; oxidizing the first metallic layer in a first environment including at least oxygen and a first gas inert with respect to the first metallic layer; providing a second metallic layer; oxidizing the second metallic layer in a second environment including at least the oxygen and a second gas inert with respect to the second metallic layer. |
| Claim: | 2. The method of claim 1 wherein at least one of the oxygen and the first gas and the oxygen and the second gas are premixed. |
| Claim: | 3. The method of claim 2 wherein at least one of the first environment and the second environment includes less than or equal to three percent of the oxygen. |
| Claim: | 4. The method of claim 1 wherein at least one of the first gas and the second gas consists essentially of Ar. |
| Claim: | 5. The method of claim 4 wherein at least one of the first environment and the second environment includes less than or equal to three percent of the oxygen. |
| Claim: | 6. The method of claim 5 wherein the at least one of the first environment and the second environment includes between one half and one and one half percent oxygen. |
| Claim: | 7. The method of claim 1 wherein the spacer layer has a thickness of less than twenty-five Angstroms. |
| Claim: | 8. The method of claim 1 wherein at least one of the free layer and the pinned layer has a spin polarization of greater than or equal to forty percent. |
| Claim: | 9. The method of claim 8 wherein the at least one of the free layer and the pinned layer include at least one of Co 90 Fe 10 , CO 75 Fe 25 , and CO 50 Fe 50 . |
| Claim: | 10. The method of claim 1 wherein at least one of the first metallic layer and the second metallic layer include at least one of aluminum, hafnium, chromium, copper, and zirconium. |
| Claim: | 11. The method of claim 1 wherein the first metallic layer providing further includes: forming less than four monolayers of the first metallic layer. |
| Claim: | 12. The method of claim 11 wherein the second metallic layer providing further includes: forming less than four monolayers of the second metallic layer. |
| Claim: | 13. The method of claim 12 further comprising: repeating the first metallic layer providing, the first metallic layer oxidizing, the second metallic layer providing, and the second metallic layer oxidizing to provide the spacer layer having a desired thickness. |
| Claim: | 14. A method for manufacturing a spacer layer in a magnetoresistive element, the spacer layer residing between a free layer and a pinned layer, comprising; providing a first metallic layer; oxidizing the first metallic layer in a first environment including a first premixture of oxygen and argon, the first premixture including between one half and one and one-half percent oxygen; providing a second metallic layer; oxidizing the second metallic layer in a second environment including a second premixture of the oxygen and the argon, the second premixture including between one half and one and one-half percent oxygen; wherein the spacer layer has a thickness of less than between two and twenty Angstroms. |
| Current U.S. Class: | 3603/242 |
| Patent References Cited: | 4066740 January 1978 Erickson 4118873 October 1978 Rothchild 4894353 January 1990 Ibok 5629922 May 1997 Moodera et al. 5835314 November 1998 Moodera et al. 5953591 September 1999 Ishihara et al. 6519123 February 2003 Sugawara et al. 6574079 June 2003 Sun et al. 6657829 December 2003 Nakazawa et al. 6713801 March 2004 Sin et al. 6754052 June 2004 Asida et al. 2002/0054462 May 2002 Sun et al. 2002/0085321 July 2002 Carey et al. 2002/0163764 November 2002 Nakazawa et al. 2003/0218058 November 2003 Shaw et al. |
| Other References: | K. Moon, et al., “PtMn-based spin-dependent tunneling materials with thin alumina barrier fabricated by two-step natural oxidation”, J. Appl. Phys., vol. 91, No. 10, May 15, 2002, pp. 7965-7967. cited by other Z.G. Zhang, et al., “Effect of natural oxidation conditions on low resistance spin tunnel junctions”, J. Appl. Phys., vol. 91, No. 10, May 15, 2002, pp. 8786-8788. cited by other J. Wang, et al., “Low-resistance spin-dependent tunnel junctions with ZrAlOx barriers,” Appl. Phys. Lett., vol. 79, No. 27, Dec. 31, 2001, pp, 4553-4555. cited by other J. R. Childress, et al., “Low resistance IrMn and PtMn tunnel valves for recording head applications”, J. Appl. Phys., vol. 89, No. 11, Jun. 1, 2001, pp. 7353-7355. cited by other K. Sin, et al., “Low Resistance Spin-Dependent Tunneling Junctions with Naturally Oxidized Tunneling Barrier”, IEEE Trans. Magn., vol. 36, No. 5, Sep. 2000, pp. 2818-2820. cited by other P. P. Freitas, et al., “Spin Dependent Tunnel Junctions for Memory and Read-Head Applications”, IEEE Trans. Magn. 36, vol. 36, No. 5, Sep. 2000, pp. 2796-2801. cited by other S. Araki, et al., “Fabrication and Electric Properties of Lapped Type of TMR Heads for —50Gb/in2 and Beyond”, IEEE Trans. Magn., vol. 38, No. 1, Jan. 2002, pp. 72-77. cited by other |
| Primary Examiner: | Davis, David D |
| Attorney, Agent or Firm: | Virtual Law Partners, LLP |
| رقم الانضمام: | edspgr.07595967 |
| قاعدة البيانات: | USPTO Patent Grants |
| الوصف غير متاح. |