التفاصيل البيبلوغرافية
| العنوان: |
Sampling apparatus, and testing apparatus |
| Document Number: |
20060279274 |
| تاريخ النشر: |
December 14, 2006 |
| Appl. No: |
11/387445 |
| Application Filed: |
March 23, 2006 |
| مستخلص: |
Each channel comprises: an AD converter which converts a signal value of a corresponding input signal into a digital value in response to a received sampling clock; a counter which counts the pulses of the sampling clock; memory which sequentially stores the digital values at addresses corresponding to the counted values of the counter; a transmission/reception unit which outputs the counted value of the counter at a point in time at which acquisition of the waveform of the input signal is to be started in a case that the channel is set to be a main channel beforehand, and which receives the start data counted value from the main channel in a case that the channel is set to be a sub-channel; and an output unit which sequentially outputs the digital values stored in the memory with the digital value stored at the address corresponding to the start data counted value as the start data. |
| Inventors: |
Yamanaka, Tsutomu (Tokyo, JP) |
| Assignees: |
Advantest Corporation (Tokyo, JP) |
| Claim: |
1. A sampling device including a plurality of channels having a function of acquiring the waveforms of a plurality of input signals, wherein each of said channels comprises: an AD converter which converts a signal value of a corresponding signal from among said input signals in response to a received sampling clock; a counter which counts the pulses of said sampling clock; memory which sequentially stores said digital values, which have been converted by said AD converter, at addresses corresponding to the counted values of said counter; a transmission/reception unit which outputs said counted value of said counter at a point in time at which acquisition of the waveform of said input signal is to be started in a case that said channel is set to be a main channel beforehand, and which receives said start data counted value from said main channel in a case that said channel is set to be a sub-channel; and an output unit which sequentially outputs said digital values stored in said memory with the digital value stored at the address corresponding to said start data counted value as the start data. |
| Claim: |
2. A sampling device according to claim 1, wherein said counter of each of said channels starts to count the pulses of said sampling clock at the same time. |
| Claim: |
3. A sampling device according to claim 2, wherein each of said channels further comprises an initializing unit which synchronously initializes said counter thereof. |
| Claim: |
4. A sampling device according to claim 1, further comprising a control unit which controls a desired channel from among said plurality of channels so as to function as a main channel, and which supplies a measurement trigger signal that instructs said main channel to start acquisition of the waveform of said input signal, wherein said transmission/reception unit of said channel which has been controlled so as to function as said main channel outputs the counted value of said counter to said control unit as said start data counted value at the time of reception of said measurement trigger signal, and wherein said control unit transmits said start data counted value thus received to said transmission/reception units of said sub-channels. |
| Claim: |
5. A sampling device according to claim 4, wherein said control unit selects two or more channels from among said plurality of channels to be said main channels, and selects said sub-channels corresponding to each of said main channels, and wherein said control unit supplies said start data counted value received from each of said main channels to said corresponding sub-channels. |
| Claim: |
6. A sampling device according to claim 1, wherein, upon said counted value coming to be the end address of said memory, said counter resets said counted value thereof. |
| Claim: |
7. A sampling device according to claim 1, wherein each of said memory outputs said digital values stored therein from the start address corresponding to said start data counted value up to the end address obtained by adding together said start address and a sampling number set beforehand by a user. |
| Claim: |
8. A sampling device according to claim 7, wherein the number of addresses of each of said memory is greater than the uppermost value of said sampling number which can be set by said user. |
| Claim: |
9. A test apparatus which tests a tested device, said test apparatus comprising: a signal supply unit which supplies a test signal to said tested device; a sampling device which synchronously acquires the waveforms of a plurality of signals output from said tested device; and a judging unit which determines the quality of said tested device based upon the waveform of each of said signals acquired by said sampling device, wherein said sampling device includes a plurality of channels corresponding to said signals, and wherein each of said channels comprises an AD converter which converts a signal value of said signal into a digital value in response to a received sampling clock, a counter which counts the pulses of said sampling clock, and memory which sequentially stores said digital values, which have been converted by said AD converter, at addresses corresponding to the counted values of said counter, and wherein a main channel, which has been selected beforehand from among said plurality of channels, outputs the counted value of said counter as the first data counted value at the start time of acquisition of the waveform of said signal, and wherein the other channels, i.e., the sub-channels from among said plurality of channels, receive said start data counted value output from said main channel, and wherein said memory of each of said main channel and said sub-channels outputs said digital values stored therein at corresponding addresses, with the data stored at the address corresponding to said start data counted value as the start data thereof. |
| Current U.S. Class: |
324158/100 |
| Current International Class: |
01 |
| رقم الانضمام: |
edspap.20060279274 |
| قاعدة البيانات: |
USPTO Patent Applications |