Electronic Resource
Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach
| العنوان: | Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach |
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| المؤلفون: | Barcelona Supercomputing Center, Rigo, Alvise, Pinto, Christian, Pouget, Kevin, Raho, Daniel, Dutoit, Denis, Martinez, Pierre-Yves, Doran, Chris, Benini, Luca, Mavroidis, Iakovos, Marazakis, Manolis, Bartsch, Valeria, Lonsdale, Guy, Pop, Antoniu, Goodacre, John, Colliot, Annaïk, Carpenter, Paul Matthew, Radojković, Petar, Pleiter, Dirk, Drouin, Dominique, Dupont de Dinechin, Benoît |
| بيانات النشر: | IEEE 2017-09-28 |
| نوع الوثيقة: | Electronic Resource |
| مستخلص: | Power consumption and high compute density are the key factors to be considered when building a compute node for the upcoming Exascale revolution. Current architectural design and manufacturing technologies are not able to provide the requested level of density and power efficiency to realise an operational Exascale machine. A disruptive change in the hardware design and integration process is needed in order to cope with the requirements of this forthcoming computing target. This paper presents the ExaNoDe H2020 research project aiming to design a highly energy efficient and highly integrated heterogeneous compute node targeting Exascale level computing, mixing low-power processors, heterogeneous co-processors and using advanced hardware integration technologies with the novel UNIMEM Global Address Space memory system. This work was supported by the ExaNoDe project that has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No. 671578. The work presented in this paper reflects only authors’ view and the European Commission is not responsible for any use that may be made of the information it contains. Peer Reviewed Postprint (author's final draft) |
| مصطلحات الفهرس: | Àrees temàtiques de la UPC::Enginyeria electrònica, High performance computing, Computer architecture, Power demand, Supercomputers, Silicon, Hardware, Program processors, Computational modeling, Exascale, HPC, Unimem, Silicon interposer, Virtualization, Supercomputadors, Programari--Disseny, Conference lecture |
| URL: | info:eu-repo/grantAgreement/EC/H2020/671578/EU/European Exascale Processor Memory Node Design/ExaNoDe |
| الاتاحة: | Open access content. Open access content Attribution-NonCommercial-NoDerivs 3.0 Spain http://creativecommons.org/licenses/by-nc-nd/3.0/es Open Access |
| ملاحظة: | 8 p. application/pdf English |
| Other Numbers: | HGF oai:upcommons.upc.edu:2117/108741 Rigo, A. [et al.]. Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach. A: "Digital System Design (DSD), 2017 Euromicro Conference on". IEEE, 2017, p. 486-493. 978-1-5386-2146-2 10.1109/DSD.2017.37 1012841696 |
| المصدر المساهم: | UNIV POLITECNICA DE CATALUNYA From OAIster®, provided by the OCLC Cooperative. |
| رقم الانضمام: | edsoai.on1012841696 |
| قاعدة البيانات: | OAIster |
| الوصف غير متاح. |