Conference
IDLD: Interlocked Dual-Circle Latch Design with Low Cost and Triple-Node-Upset-Recovery for Aerospace Applications
العنوان: | IDLD: Interlocked Dual-Circle Latch Design with Low Cost and Triple-Node-Upset-Recovery for Aerospace Applications |
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المؤلفون: | Yan, Aibin, Dong, Chen, Guo, Xing, Song, Jie, Cui, Jie, Ni, Tianming, Girard, Patrick, Wen, Xiaoqing |
المساهمون: | Hefei University of Technology (HFUT), Anhui University Hefei, Anhui Polytechnic University, Test and dEpendability of microelectronic integrated SysTems (LIRMM, Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier (LIRMM), Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM), Kyushu Institute of Technology (Kyutech) |
المصدر: | GLSVLSI 2024 - ACM Great Lakes Symposium on VLSI ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-04738332 ; GLSVLSI 2024 - ACM Great Lakes Symposium on VLSI, Jun 2024, Clearwater, FL, United States. pp.19-24, ⟨10.1145/3649476.3658761⟩ |
بيانات النشر: | HAL CCSD ACM |
سنة النشر: | 2024 |
المجموعة: | Université de Montpellier: HAL |
مصطلحات موضوعية: | Radiation hardness, Soft error tolerance, Robust computing, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics |
جغرافية الموضوع: | Clearwater, FL, United States |
الوصف: | International audience ; Modern powerful CMOS chips are usually highly integrated and implemented with aggressively shrunk technology nodes. In radiation environment, under charge-sharing mechanism, one particle striking can simultaneously impact multiple nodes causing double-node-upsets (DNUs) and triple-node-upsets (TNUs). In this paper, we propose an Interlocked Dual-circle Latch Design, namely IDLD, with low cost and TNU recovery for aerospace applications. IDLD consists of four transmission gates and twelve 2-input Celements (CEs) implemented in 22nm CMOS process. Simulation results demonstrate the complete TNU recovery as well as costeffectiveness for the proposed IDLD latch. |
نوع الوثيقة: | conference object |
اللغة: | English |
DOI: | 10.1145/3649476.3658761 |
الاتاحة: | https://hal-lirmm.ccsd.cnrs.fr/lirmm-04738332 https://hal-lirmm.ccsd.cnrs.fr/lirmm-04738332v1/document https://hal-lirmm.ccsd.cnrs.fr/lirmm-04738332v1/file/GlsVLSI%2724-DongChen-Publication.pdf https://doi.org/10.1145/3649476.3658761 |
Rights: | info:eu-repo/semantics/OpenAccess |
رقم الانضمام: | edsbas.F2F0A35 |
قاعدة البيانات: | BASE |
DOI: | 10.1145/3649476.3658761 |
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