التفاصيل البيبلوغرافية
| العنوان: |
Multiplexing AER Asynchronous Channels over LVDS Links with Flow-Control and Clock-Correction for Scalable Neuromorphic Systems |
| المؤلفون: |
Yousefzadeh, Amirreza, Jablonski, M., Iakymchuk, T., Linares Barranco, Alejandro, Rosado, A., Plana, L.A., Serrano Gotarredona, María Teresa, Furber, Steve B., Linares Barranco, Bernabé |
| المساهمون: |
Universidad de Sevilla. Departamento de Arquitectura y Tecnología de Computadores, Universidad de Sevilla. TEP-108: Robótica y Tecnología de Computadores Aplicada a la Rehabilitación |
| بيانات النشر: |
IEEE Computer Society |
| سنة النشر: |
2020 |
| المجموعة: |
idUS - Deposito de Investigación Universidad de Sevilla |
| مصطلحات موضوعية: |
Neuromorphic Systems, Virtual Wiring, Address event representation (AER), Scalable Neuromorphic Systems |
| الوصف: |
Address-Event-Representation (AER) is a widely extended asynchronous technique for interchanging “neural spikes” among different hardware elements in Neuromorphic Systems. Conventional AER links use parallel physical wires together with a pair of handshaking signals (Request and Acknowledge). Here we present a fully serial implementation using bidirectional SATA connectors with a pair of LVDS (low voltage differential signaling) wires for each direction. The proposed implementation can multiplex a number of conventional parallel AER links per LVDS physical connection. It uses flow control, clock correction, and byte alignment techniques to transmit 32-bit address events reliably over multiplexed serial connections. The setup has been tested using commercial Spartan6 FPGAs reaching a maximum event transmission speed of 75Meps (Mega Events per second) for 32-bit events at 3.0Gbps line data rate. ; Ministerio de Economía y Competitividad TEC2012-37868-C04-01 ; Ministerio de Economía y Competitividad TEC2015-63884-C2-1-P ; Ministerio de Economía y Competitividad TEC2016-77785-P ; Junta de Andalucía TIC-6091 |
| نوع الوثيقة: |
conference object |
| اللغة: |
English |
| Relation: |
ISCAS 2017: IEEE International Symposium on Circuits and Systems (2017); TEC2012-37868-C04-01; TEC2015-63884-C2-1-P; TEC2016-77785-P; TIC-6091; https://ieeexplore.ieee.org/abstract/document/8050802; New York, USA; https://idus.us.es/handle//11441/93156 |
| الاتاحة: |
https://idus.us.es/handle//11441/93156 |
| Rights: |
Attribution-NonCommercial-NoDerivatives 4.0 Internacional ; http://creativecommons.org/licenses/by-nc-nd/4.0/ ; info:eu-repo/semantics/openAccess |
| رقم الانضمام: |
edsbas.F0DBC2CB |
| قاعدة البيانات: |
BASE |