Academic Journal
Ternary combinational logic gate design based on tri-valued memristors
| العنوان: | Ternary combinational logic gate design based on tri-valued memristors |
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| المؤلفون: | Li, Xiao-Jing, Wang, Xiao-Yuan, Li, Pu, Iu, Herbert H. C., Cheng, Zhi-Qun |
| المصدر: | Frontiers in Physics ; volume 11 ; ISSN 2296-424X |
| بيانات النشر: | Frontiers Media SA |
| سنة النشر: | 2023 |
| المجموعة: | Frontiers (Publisher - via CrossRef) |
| الوصف: | Traditional binary combinational logic circuits are generally obtained by cascading multiple basic logic gate circuits, using more components and complicated wiring. In contrast to the binary logic circuit design in this method, ternary combinational logic circuit implementation is more complicated. In this paper, a ternary circuit design method that does not require cascading basic ternary logic gates is proposed based on a tri-valued memristor, which can directly realize specific logic functions through a series connection of memristors. The ternary encoder, ternary decoder, ternary comparator, and ternary data selector are implemented by this method, and the effectiveness of the circuits is verified by LTspice simulations. |
| نوع الوثيقة: | article in journal/newspaper |
| اللغة: | unknown |
| DOI: | 10.3389/fphy.2023.1292336 |
| DOI: | 10.3389/fphy.2023.1292336/full |
| الاتاحة: | http://dx.doi.org/10.3389/fphy.2023.1292336 https://www.frontiersin.org/articles/10.3389/fphy.2023.1292336/full |
| Rights: | https://creativecommons.org/licenses/by/4.0/ |
| رقم الانضمام: | edsbas.DF6521F1 |
| قاعدة البيانات: | BASE |
| DOI: | 10.3389/fphy.2023.1292336 |
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