Academic Journal

Wirelength reduction by using diagonal wire

التفاصيل البيبلوغرافية
العنوان: Wirelength reduction by using diagonal wire
المؤلفون: Charles Chiang, Qing Su
المساهمون: The Pennsylvania State University CiteSeerX Archives
المصدر: http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2003/glsvlsi03/pdffiles/p1_11.pdf.
المجموعة: CiteSeerX
مصطلحات موضوعية: Categories and Subject Descriptors B.7.2 [Integrated Circuits, Design Aids—Layout General Terms Algorithms, Experimentation Keywords Steiner tree, routing, 450 routing, diagonal routing
الوصف: We study the octilinear Steiner tree to evaluate the recti-linear Steiner tree based router. First, we give the worst and average case wirelength for rectilinear routing and oc-tilinear routing for two terminals net. Next, we show the octilinear Steiner trees have smaller wirelength reduction for multiterminal net than that of rectilinear Steiner tree. Then, we propose an O(|V |+ |E|) algorithm to construct an isomorphic octilinear Steiner tree from a rectilinear Steiner tree G = (V,E) and prove the wirelength of the isomor-phic octilinear Steiner tree is the lower bound. In the end, we show two types of experiment of wirelength reduction results by using diagonal wire The octilinear Steiner tree re-duces 9.201 % and 6.63 % of the wirelength over rectilinear Steiner tree on a set of nets generated at random and on 15 VLSI designs, respectively.
نوع الوثيقة: text
وصف الملف: application/pdf
اللغة: English
Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.536.7934; http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2003/glsvlsi03/pdffiles/p1_11.pdf
الاتاحة: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.536.7934
http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2003/glsvlsi03/pdffiles/p1_11.pdf
Rights: Metadata may be used without restrictions as long as the oai identifier remains attached to it.
رقم الانضمام: edsbas.BE538BEE
قاعدة البيانات: BASE