Academic Journal
2 Research scholar, New Delhi
| العنوان: | 2 Research scholar, New Delhi |
|---|---|
| المؤلفون: | Mohamed Azeem Hafeez, Anuj Shaw |
| المساهمون: | The Pennsylvania State University CiteSeerX Archives |
| المصدر: | http://www.ijera.com/papers/Vol2_issue6/BG26386390.pdf. |
| المجموعة: | CiteSeerX |
| مصطلحات موضوعية: | ECB, Gate leakage, HVB, PDCVSL, PCPL |
| الوصف: | Before the CMOS process is scaled into deep sub-micron process, dynamic energy loss has always dominated power dissipation, while leakage power is little. The aggressive scaling of device dimensions and threshold voltage has significantly increased leakage current exponentially, thus the MOS devices will no longer be totally turned-off anymore. The power dissipation caused by leakage current can’t be neglected anymore, which attracts extensive attentions. Based on the fact that PMOS transistors have an order of magnitude smaller gate leakage than NMOS ones, it is used for designing circuit for reducing gate leakage power. Series of iterative steps are carried out to find the design perspective effect in different technologies. |
| نوع الوثيقة: | text |
| وصف الملف: | application/pdf |
| اللغة: | English |
| Relation: | http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.642.7910; http://www.ijera.com/papers/Vol2_issue6/BG26386390.pdf |
| الاتاحة: | http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.642.7910 http://www.ijera.com/papers/Vol2_issue6/BG26386390.pdf |
| Rights: | Metadata may be used without restrictions as long as the oai identifier remains attached to it. |
| رقم الانضمام: | edsbas.5BB1560E |
| قاعدة البيانات: | BASE |
| الوصف غير متاح. |