Conference
Watershed parallel algorithm for asynchronous processors array
| العنوان: | Watershed parallel algorithm for asynchronous processors array |
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| المؤلفون: | Galilee, B., Mamalet, F., Renaudin, Marc, Coulon, P.Y. |
| المساهمون: | France Télécom Recherche & Développement (FT R&D), France Télécom, Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS) |
| المصدر: | Proceedings-2002-IEEE-International-Conference-on-Multimedia-and-Expo-(ICME) ; https://hal.science/hal-00009600 ; : Proceedings-2002-IEEE-International-Conference-on-Multimedia-and-Expo-(ICME), 2002, Lausanne, Switzerland. pp.793-6 vol.1, ⟨10.1109/ICME.2002.1035901⟩ |
| بيانات النشر: | CCSD IEEE |
| سنة النشر: | 2002 |
| المجموعة: | Université Grenoble Alpes: HAL |
| مصطلحات موضوعية: | watershed-parallel-algorithm, asynchronous-processors-array, joint-algorithm-architecture-analys, PACS 85.42, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics |
| جغرافية الموضوع: | Lausanne, Switzerland |
| الوصف: | ISBN: 0780373049 ; A joint algorithm-architecture analysis leads to a new version of picture segmentation system adapted to multimedia mobile terminal constraints. The asynchronous processors network, with a granularity level of one processor per pixel, based on data flow model, takes less than 10 mu s to segment a SQCIF $88*72 pixels - image (about 2000 times faster than the classical sequential watershed algorithms). The main originality of the proposed algorithm is only one global synchronization point is needed in order to complete the segmentation transformation, instead of the three (or more) classical points: minima detection, labelization and flooding. Our system tends to cope with multimedia mobile phones constraints, i.e. real time computing circuit, low power. We have simulated and validated this system thanks to "SystemC" library; VHDL synchronous prototyping shows up results accordingly. |
| نوع الوثيقة: | conference object |
| اللغة: | English |
| DOI: | 10.1109/ICME.2002.1035901 |
| الاتاحة: | https://hal.science/hal-00009600 https://doi.org/10.1109/ICME.2002.1035901 |
| رقم الانضمام: | edsbas.3FB4B0F2 |
| قاعدة البيانات: | BASE |
| DOI: | 10.1109/ICME.2002.1035901 |
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