التفاصيل البيبلوغرافية
| العنوان: |
Area Efficient Dual-Fed CMOS Distributed Power Amplifier |
| المؤلفون: |
Javier del Pino, Sunil L. Khemchandani, Sergio Mateos-Angulo, Daniel Mayor-Duarte, Mario San-Miguel-Montesdeoca |
| المصدر: |
Electronics; Volume 7; Issue 8; Pages: 139 |
| بيانات النشر: |
Multidisciplinary Digital Publishing Institute |
| سنة النشر: |
2018 |
| المجموعة: |
MDPI Open Access Publishing |
| مصطلحات موضوعية: |
distributed power amplifier, dual-fed, stacked inductor, multilevel inductor, area reduction |
| الوصف: |
In this paper, an area-efficient 4-stage dual-fed distributed power amplifier (DPA) implemented in a 0.35 μm Complementary Metal Oxide Semiconductor (CMOS) process is presented. To effectively reduce the area of the circuit, techniques such as using multilevel inductors and closely-placing conventional spiral inductors are employed. Additionally, a novel technique based on stacking inductors one on top of others is implemented. Based on these techniques, a 32% area reduction is achieved compared to a conventional design without a noticeable performance degradation. This reduction could be further exploited as the number of stages of the dual-fed DPA increases. |
| نوع الوثيقة: |
text |
| وصف الملف: |
application/pdf |
| اللغة: |
English |
| Relation: |
https://dx.doi.org/10.3390/electronics7080139 |
| DOI: |
10.3390/electronics7080139 |
| الاتاحة: |
https://doi.org/10.3390/electronics7080139 |
| Rights: |
https://creativecommons.org/licenses/by/4.0/ |
| رقم الانضمام: |
edsbas.20EC0C53 |
| قاعدة البيانات: |
BASE |