Generation of a fault-tolerant clock through redundant crystal oscillators
العنوان: | Generation of a fault-tolerant clock through redundant crystal oscillators |
---|---|
المؤلفون: | Matthias Függer, Wolfgang Dür, Andreas Steininger |
المساهمون: | Vienna University of Technology (TU Wien), Institute of Computer Engineering [Vienna], Laboratoire Méthodes Formelles (LMF), Institut National de Recherche en Informatique et en Automatique (Inria)-CentraleSupélec-Université Paris-Saclay-Centre National de la Recherche Scientifique (CNRS)-Ecole Normale Supérieure Paris-Saclay (ENS Paris Saclay), Modeling and Exploitation of Interaction and Concurrency (MEXICO), Inria Saclay - Ile de France, Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-Laboratoire Méthodes Formelles (LMF), Institut National de Recherche en Informatique et en Automatique (Inria)-CentraleSupélec-Université Paris-Saclay-Centre National de la Recherche Scientifique (CNRS)-Ecole Normale Supérieure Paris-Saclay (ENS Paris Saclay)-CentraleSupélec-Université Paris-Saclay-Centre National de la Recherche Scientifique (CNRS)-Ecole Normale Supérieure Paris-Saclay (ENS Paris Saclay) |
المصدر: | Microelectronics Reliability Microelectronics Reliability, Elsevier, 2021, 120, pp.114088. ⟨10.1016/j.microrel.2021.114088⟩ Microelectronics Reliability, 2021, 120, pp.114088. ⟨10.1016/j.microrel.2021.114088⟩ |
بيانات النشر: | HAL CCSD, 2021. |
سنة النشر: | 2021 |
مصطلحات موضوعية: | [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Correctness, Computer science, 02 engineering and technology, Topology, 01 natural sciences, Formal proof, Computer Science::Hardware Architecture, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Independent clock, Electrical and Electronic Engineering, Safety, Risk, Reliability and Quality, 010302 applied physics, 020208 electrical & electronic engineering, Skew, Fault tolerance, Condensed Matter Physics, Atomic and Molecular Physics, and Optics, Surfaces, Coatings and Films, Electronic, Optical and Magnetic Materials, Clock network, [INFO.INFO-MA]Computer Science [cs]/Multiagent Systems [cs.MA], Single point of failure, [INFO.INFO-DC]Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC], Crystal oscillator |
الوصف: | International audience; Having a precise and stable clock that is still fault tolerant is a fundamental prerequisite in safety critical realtime systems. However, combining redundant independent clock sources to form a unified fault-tolerant clock supply is non-trivial, especially when redundant clock outputs are required-e.g., for supplying the replicated nodes within a TMR architecture through a clock network that does not suffer from a single point of failure. Having these outputs fail independent but still keeping them tightly synchronized is highly desirable, as it substantially eases the design of the overall architecture. In this paper we address exactly this challenge. Our approach extends an existing, ring-oscillator like distributed clock generation scheme by augmenting each of its constituent nodes with a stable clock reference. We introduce the appropriately modified algorithm and illustrate its operation by simulation experiments. These experiments further demonstrate that the four clock outputs of our circuit do not share a single point of failure, have small and bounded skew, remain stabilized to one crystal source during normal operation, do not propagate glitches from one failed clock to a correct one, and only exhibit slightly extended clock cycles during a short stabilization period after a component failure. In addition we give a rigorous formal proof for the correctness of the algorithm on an abstraction level that is close to the implementation. |
اللغة: | English |
تدمد: | 0026-2714 |
DOI: | 10.1016/j.microrel.2021.114088⟩ |
URL الوصول: | https://explore.openaire.eu/search/publication?articleId=doi_dedup___::909c68f0c91836f36a95726a248ac8d2 https://hal.inria.fr/hal-03329844 |
Rights: | OPEN |
رقم الانضمام: | edsair.doi.dedup.....909c68f0c91836f36a95726a248ac8d2 |
قاعدة البيانات: | OpenAIRE |
تدمد: | 00262714 |
---|---|
DOI: | 10.1016/j.microrel.2021.114088⟩ |