Application-aware prefetch prioritization in on-chip networks

التفاصيل البيبلوغرافية
العنوان: Application-aware prefetch prioritization in on-chip networks
المؤلفون: Chita R. Das, Nachiappan Chidambaram Nachiappan, Anand Sivasubramaniam, Onur Mutlu, Mahmut Kandemir, Asit K. Mishra
المصدر: PACT
بيانات النشر: ACM, 2012.
سنة النشر: 2012
مصطلحات موضوعية: Instruction prefetch, Multi-core processor, Interconnection, Hardware_MEMORYSTRUCTURES, Computer science, business.industry, Embedded system, Rank (computer programming), Multiprocessing, Cache, Interference (wave propagation), business, CAS latency
الوصف: Data prefetching is an effective technique for hiding memory latency. When issued prefetches are inaccurate, performance can degrade. Prior research provided solutions to deal with inaccurate prefetches at the cache and memory levels, but not in the interconnect of a large-scale multiprocessor system. This work introduces application-aware prefetch prioritization techniques to mitigate the negative effects of prefetching in a network-on-chip (NoC) based multicore system. The idea is to rank prefetches from different applications based on their potential utility for the application and propensity to cause interference to other applications. Our evaluation shows that this approach provides significant performance improvements over a baseline that does not distinguish between prefetches from different applications.
DOI: 10.1145/2370816.2370886
URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_________::661ec9636895739a590af63a8490c54d
https://doi.org/10.1145/2370816.2370886
Rights: OPEN
رقم الانضمام: edsair.doi...........661ec9636895739a590af63a8490c54d
قاعدة البيانات: OpenAIRE