This work Demonstrates a wideband LNA for 5G receiver front end modules with high linearity, Low noise reused topology has an inter stage wideband inductor based two common source cascade stages. The configuration provides the bias current; better Noise figure increases the forward gain. By providing RC Series network at gate terminal of second stage the return losses are reduced and stability will be increased. After pre and post simulation all parameters are better than the existing LNAS. After post simulation results, the Noise figure is achieved less than 1dB and forward gain as flat 16dB for wide band width of 1.5 – 5.5 GHz. At the 1dB compression point the output is 20dbm achieved and OIP3 IS +40dbm is achieved. The chip size of an LNA along with pad is 0.64mm2. The design is GaAsp HEMT process at 50nm technology.