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Low dislocation density semiconductor device

التفاصيل البيبلوغرافية
العنوان: Low dislocation density semiconductor device
Patent Number: 5,068,695
تاريخ النشر: November 26, 1991
Appl. No: 07/506,046
Application Filed: April 09, 1990
مستخلص: A low dislocation density semiconductor device includes a first semiconductor layer of a III-V or II-VI semiconductor compound and alloying atoms on a non-metal substrate. The semiconductor compound usually has a large dislocation density. A predetermined position of the alloying atoms in the compound lattice structure can substantially reduce the compound dislocation density. Energy is applied to the alloying atoms so they are at the predetermined positions. The number of alloying atoms causes the semiconductor compound solubility limit to be exceeded. The layer is formed on a substrate of the III-V or II-VI semiconductor, such as gallium arsenide or another semiconductor, such as silicon or on an insulator such as sapphire. In the latter cases, the layer is formed on an intermediate layer having a lattice constant between that of the substrate and semiconductor compound. A second layer is epitaxially deposited on the first layer so both layers have virtually the same lattice constant and dislocation density. The alloying atoms are deposited by different energy assist methods, e.g. by an ion beam that irradiates the substrate, or by an energy assisted organometallic chemical vapor deposition process. The energy assist can be by ionization or optical irradiation causing topical heating of surface atoms deposited by the OMCVD process, without heating of the substrate or the underlying atoms. If the ion beam process is employed, the substrate is annealed such that the alloying atoms move from initial random locations thereof in the compound lattice to the predetermined locations.
Inventors: Mooney, John B. (San Jose, CA); Sher, Arden (San Carlos, CA)
Assignees: SRI International (Menlo Park, CA)
Claim: What is claimed is
Claim: 1. A low dislocation density semiconductor structure comprising a non-metallic substrate having the usual dislocation density for the material of the substrate, a first epitaxial layer of a III-V or II-VI semiconductor compound carried by the substrate, the compound being alloyed with atoms of a type and quantity to cause the first epitaxial layer to be formed with a low dislocation density relative to the dislocation density the first epitaxial layer would have if it were not alloyed with the alloying atoms, the number of alloying atoms being such that the alloying atoms are supersaturated in the III-V or II-VI semiconductor compound of the first epitaxial layer, a second epitaxial layer overlaying the first epitaxial layer and consisting of the III-V or II-VI compound of the first layer without the alloying atoms, the second layer having approximately the same lattice constant and dislocation density as the formed low dislocation density first layer.
Claim: 2. The structure of claim 1 wherein the substrate consists essentially of the III-V or II-VI compound.
Claim: 3. The structure of claim 2 wherein the substrate consists essentially of GaAs.
Claim: 4. The structure of claim 3 wherein the GaAs compound of the first layer is alloyed with N to form the first layer as GaN.sub.y As.sub.1-y, where y is a value causing N to be supersaturated in GaAs.
Claim: 5. The structure of claim 3 wherein the GaAs compound of the first layer is alloyed with B to form the first layer as Ga.sub.1-x B.sub.x As, where x is a value causing B to be supersaturated in GaAs.
Claim: 6. The structure of claim 5 wherein 0.01.ltoreq.x.ltoreq.0.05 and 0.005.ltoreq.y.ltoreq.0.05.
Claim: 7. The structure of claim 1 wherein the substrate consists essentially of a semiconductor from column IV of the periodic chart.
Claim: 8. The structure of claim 1 wherein the substrate consists essentially of silicon.
Claim: 9. The structure of claim 8 wherein 0.01.ltoreq.x.ltoreq.0.05.
Claim: 10. The structure of claim 9 where 0.005.ltoreq.y.ltoreq.0.05.
Claim: 11. The structure of claim 8 wherein the first and second layers consist essentially of Ga.sub.1-x B.sub.x As and GaAs, respectively, where 0.0009.ltoreq.x.ltoreq.0.3.
Claim: 12. The structure of claim 8 wherein the first and second layers consist essentially of GaN.sub.y As.sub.1-y and GaAs, respectively, where y has a value causing N to be supersaturated in GaAs.
Claim: 13. The structure of 8 further including lattice matching layer means between the first layer and the substrate.
Claim: 14. The structure of claim 1 wherein the substrate and first layer have different lattice constants, and further including lattice matching layer means sandwiched between the substrate and first layer.
Claim: 15. The structure of claim 14 wherein the layer means includes a superlattice layer structure.
Claim: 16. The structure of claim 15 wherein the superlattice structure consists of [equation included]
Claim: where 0
Claim: 17. The structure of claim 15 wherein the supperlattice structure consists of [equation included]
Claim: where 0
Claim: 18. The structure of claim 17 wherein the substrate consists essentially of Si.
Claim: 19. The structure of claim 14 wherein the layer means includes a graded layer.
Claim: 20. The structure of claim 19 wherein the graded layer consists of essentially Ga.sub.1-y B.sub.y As, where y is graded from 0.27 to 0.002 and the substrate consists essentially of Si and the second layer consists of essentially GaAs.
Claim: 21. The structure of claim 19 wherein the graded layer consists of essentially Si.sub.1-y Ge.sub.y, where the substrate consists of essentially Si and the first layer consists of essentially Ga.sub.1-x B.sub.x As, where 0.0009
Claim: 22. The structure of claim 14 wherein the layer means includes a layer of a single constituent.
Claim: 23. The structure of claim 22 wherein the substrate consists of essentially Si, the layer means consists of essentially Ge, and the first layer consists of essentially Ga.sub.1-x B.sub.x As, where 0.0009
Claim: 24. The structure of claim 1 wherein the substrate consists essentially of germanium.
Claim: 25. The structure of claim 1 wherein the substrate consists essentially of a metal oxide dielectric.
Claim: 26. The structure of claim 25 wherein the metal oxide dielectric is sapphire.
Claim: 27. The structure of claim 1 further including multiple, active semiconductor devices formed on said second layer.
Claim: 28. The structure of claim 1 wherein the number of alloying atoms is such that the alloying atoms are not precipitated from the first layer.
Claim: 29. A low dislocation density semiconductor structure comprising a non-metallic substrate having the usual dislocation density for the material of the substrate, a first region of a III-V or II-VI semiconductor compound carried by the substrate, the compound being alloyed with atoms of a type and quantity to cause the first region to be formed with a low dislocation density relative to the dislocation density the first region would have if it were not alloyed with the alloying atoms, the number of alloying atoms being such that the alloying atoms are supersaturated in the III-V or II-VI semiconductor compound of the first region, a second region overlaying the first region, the second region consisting of the II-V or II-VI compound of the first region without the alloying atoms, the second region having approximately the same lattice constant and dislocation density as the formed low dislocation density first region.
Current U.S. Class: 357/16; 357/4; 357/61; 357/63; 357/30; 437/976; 437/987
Current International Class: H01L 29161; H01L 29205
Patent References Cited: 3492175 January 1970 Conrad et al.
4255211 March 1981 Fraas
4366334 December 1982 Cremoux et al.
4370510 January 1983 Stirn
4568792 February 1986 Mooney et al.
4575742 March 1986 Kohashi et al.
4611388 September 1986 Pande
4659401 April 1987 Reif et al.
4670176 June 1987 Morioka et al.
4697202 September 1987 Sher
4734514 March 1988 Melas et al.
4740606 April 1988 Melas
4775639 October 1988 Yoshida
4806996 February 1989 Luryi
4865655 September 1989 Fujita et al.
4916088 April 1990 Mooney et al.
Other References: "Intermetallic Semiconductor Buffered Substrate", Research Disclosure, No. 270, 10/1986.
Primary Examiner: Hille, Rolf
Assistant Examiner: Tran, Minhloan
Attorney, Agent or Firm: Lowe, Price, LeBlanc & Becker
رقم الانضمام: edspgr.05068695
قاعدة البيانات: USPTO Patent Grants
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USPTO Patent Grants
edspgr.05068695
697
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Patent
patent
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Items Array ( [Name] => Title [Label] => Title [Group] => Ti [Data] => Low dislocation density semiconductor device )
Array ( [Name] => DocumentID [Label] => Patent Number [Group] => Patent [Data] => 5,068,695 )
Array ( [Name] => DateEntry [Label] => Publication Date [Group] => Patent [Data] => November 26, 1991 )
Array ( [Name] => DocumentID [Label] => Appl. No [Group] => Patent [Data] => 07/506,046 )
Array ( [Name] => DateFiled [Label] => Application Filed [Group] => Patent [Data] => April 09, 1990 )
Array ( [Name] => Abstract [Label] => Abstract [Group] => Ab [Data] => A low dislocation density semiconductor device includes a first semiconductor layer of a III-V or II-VI semiconductor compound and alloying atoms on a non-metal substrate. The semiconductor compound usually has a large dislocation density. A predetermined position of the alloying atoms in the compound lattice structure can substantially reduce the compound dislocation density. Energy is applied to the alloying atoms so they are at the predetermined positions. The number of alloying atoms causes the semiconductor compound solubility limit to be exceeded. The layer is formed on a substrate of the III-V or II-VI semiconductor, such as gallium arsenide or another semiconductor, such as silicon or on an insulator such as sapphire. In the latter cases, the layer is formed on an intermediate layer having a lattice constant between that of the substrate and semiconductor compound. A second layer is epitaxially deposited on the first layer so both layers have virtually the same lattice constant and dislocation density. The alloying atoms are deposited by different energy assist methods, e.g. by an ion beam that irradiates the substrate, or by an energy assisted organometallic chemical vapor deposition process. The energy assist can be by ionization or optical irradiation causing topical heating of surface atoms deposited by the OMCVD process, without heating of the substrate or the underlying atoms. If the ion beam process is employed, the substrate is annealed such that the alloying atoms move from initial random locations thereof in the compound lattice to the predetermined locations. )
Array ( [Name] => Author [Label] => Inventors [Group] => Patent [Data] => <searchLink fieldCode="ZA" term="%22Mooney%2C+John+B%2E%22">Mooney, John B.</searchLink> (San Jose, CA); <searchLink fieldCode="ZA" term="%22Sher%2C+Arden%22">Sher, Arden</searchLink> (San Carlos, CA) )
Array ( [Name] => OtherAuthors [Label] => Assignees [Group] => Patent [Data] => <searchLink fieldCode="ZS" term="%22SRI+International%22">SRI International</searchLink> (Menlo Park, CA) )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => What is claimed is )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 1. A low dislocation density semiconductor structure comprising a non-metallic substrate having the usual dislocation density for the material of the substrate, a first epitaxial layer of a III-V or II-VI semiconductor compound carried by the substrate, the compound being alloyed with atoms of a type and quantity to cause the first epitaxial layer to be formed with a low dislocation density relative to the dislocation density the first epitaxial layer would have if it were not alloyed with the alloying atoms, the number of alloying atoms being such that the alloying atoms are supersaturated in the III-V or II-VI semiconductor compound of the first epitaxial layer, a second epitaxial layer overlaying the first epitaxial layer and consisting of the III-V or II-VI compound of the first layer without the alloying atoms, the second layer having approximately the same lattice constant and dislocation density as the formed low dislocation density first layer. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 2. The structure of claim 1 wherein the substrate consists essentially of the III-V or II-VI compound. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 3. The structure of claim 2 wherein the substrate consists essentially of GaAs. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 4. The structure of claim 3 wherein the GaAs compound of the first layer is alloyed with N to form the first layer as GaN.sub.y As.sub.1-y, where y is a value causing N to be supersaturated in GaAs. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 5. The structure of claim 3 wherein the GaAs compound of the first layer is alloyed with B to form the first layer as Ga.sub.1-x B.sub.x As, where x is a value causing B to be supersaturated in GaAs. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 6. The structure of claim 5 wherein 0.01.ltoreq.x.ltoreq.0.05 and 0.005.ltoreq.y.ltoreq.0.05. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 7. The structure of claim 1 wherein the substrate consists essentially of a semiconductor from column IV of the periodic chart. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 8. The structure of claim 1 wherein the substrate consists essentially of silicon. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 9. The structure of claim 8 wherein 0.01.ltoreq.x.ltoreq.0.05. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 10. The structure of claim 9 where 0.005.ltoreq.y.ltoreq.0.05. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 11. The structure of claim 8 wherein the first and second layers consist essentially of Ga.sub.1-x B.sub.x As and GaAs, respectively, where 0.0009.ltoreq.x.ltoreq.0.3. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 12. The structure of claim 8 wherein the first and second layers consist essentially of GaN.sub.y As.sub.1-y and GaAs, respectively, where y has a value causing N to be supersaturated in GaAs. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 13. The structure of 8 further including lattice matching layer means between the first layer and the substrate. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 14. The structure of claim 1 wherein the substrate and first layer have different lattice constants, and further including lattice matching layer means sandwiched between the substrate and first layer. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 15. The structure of claim 14 wherein the layer means includes a superlattice layer structure. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 16. The structure of claim 15 wherein the superlattice structure consists of [equation included] )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => where 0<y<0.3 and n is an integer greater than 1 equal to the number of GaN.sub.1--y As/GAAs cycles of the superlattice structure. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 17. The structure of claim 15 wherein the supperlattice structure consists of [equation included] )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => where 0<x<0.3 and n is an integer greater than 1 equal to the number of Ga.sub.1-x B.sub.x As/GaAs cycles of the superlattice structure. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 18. The structure of claim 17 wherein the substrate consists essentially of Si. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 19. The structure of claim 14 wherein the layer means includes a graded layer. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 20. The structure of claim 19 wherein the graded layer consists of essentially Ga.sub.1-y B.sub.y As, where y is graded from 0.27 to 0.002 and the substrate consists essentially of Si and the second layer consists of essentially GaAs. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 21. The structure of claim 19 wherein the graded layer consists of essentially Si.sub.1-y Ge.sub.y, where the substrate consists of essentially Si and the first layer consists of essentially Ga.sub.1-x B.sub.x As, where 0.0009<x<0.3, and 0<y.ltoreq.1. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 22. The structure of claim 14 wherein the layer means includes a layer of a single constituent. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 23. The structure of claim 22 wherein the substrate consists of essentially Si, the layer means consists of essentially Ge, and the first layer consists of essentially Ga.sub.1-x B.sub.x As, where 0.0009<x<0.3. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 24. The structure of claim 1 wherein the substrate consists essentially of germanium. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 25. The structure of claim 1 wherein the substrate consists essentially of a metal oxide dielectric. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 26. The structure of claim 25 wherein the metal oxide dielectric is sapphire. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 27. The structure of claim 1 further including multiple, active semiconductor devices formed on said second layer. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 28. The structure of claim 1 wherein the number of alloying atoms is such that the alloying atoms are not precipitated from the first layer. )
Array ( [Name] => Comment [Label] => Claim [Group] => Patent [Data] => 29. A low dislocation density semiconductor structure comprising a non-metallic substrate having the usual dislocation density for the material of the substrate, a first region of a III-V or II-VI semiconductor compound carried by the substrate, the compound being alloyed with atoms of a type and quantity to cause the first region to be formed with a low dislocation density relative to the dislocation density the first region would have if it were not alloyed with the alloying atoms, the number of alloying atoms being such that the alloying atoms are supersaturated in the III-V or II-VI semiconductor compound of the first region, a second region overlaying the first region, the second region consisting of the II-V or II-VI compound of the first region without the alloying atoms, the second region having approximately the same lattice constant and dislocation density as the formed low dislocation density first region. )
Array ( [Name] => CodeClass [Label] => Current U.S. Class [Group] => Patent [Data] => 357/16; 357/4; 357/61; 357/63; 357/30; 437/976; 437/987 )
Array ( [Name] => CodeClass [Label] => Current International Class [Group] => Patent [Data] => H01L 29161; H01L 29205 )
Array ( [Name] => Ref [Label] => Patent References Cited [Group] => Patent [Data] => <searchLink fieldCode="RF" term="%223492175%22">3492175</searchLink> January 1970 Conrad et al.<br /><searchLink fieldCode="RF" term="%224255211%22">4255211</searchLink> March 1981 Fraas<br /><searchLink fieldCode="RF" term="%224366334%22">4366334</searchLink> December 1982 Cremoux et al.<br /><searchLink fieldCode="RF" term="%224370510%22">4370510</searchLink> January 1983 Stirn<br /><searchLink fieldCode="RF" term="%224568792%22">4568792</searchLink> February 1986 Mooney et al.<br /><searchLink fieldCode="RF" term="%224575742%22">4575742</searchLink> March 1986 Kohashi et al.<br /><searchLink fieldCode="RF" term="%224611388%22">4611388</searchLink> September 1986 Pande<br /><searchLink fieldCode="RF" term="%224659401%22">4659401</searchLink> April 1987 Reif et al.<br /><searchLink fieldCode="RF" term="%224670176%22">4670176</searchLink> June 1987 Morioka et al.<br /><searchLink fieldCode="RF" term="%224697202%22">4697202</searchLink> September 1987 Sher<br /><searchLink fieldCode="RF" term="%224734514%22">4734514</searchLink> March 1988 Melas et al.<br /><searchLink fieldCode="RF" term="%224740606%22">4740606</searchLink> April 1988 Melas<br /><searchLink fieldCode="RF" term="%224775639%22">4775639</searchLink> October 1988 Yoshida<br /><searchLink fieldCode="RF" term="%224806996%22">4806996</searchLink> February 1989 Luryi<br /><searchLink fieldCode="RF" term="%224865655%22">4865655</searchLink> September 1989 Fujita et al.<br /><searchLink fieldCode="RF" term="%224916088%22">4916088</searchLink> April 1990 Mooney et al. )
Array ( [Name] => Ref [Label] => Other References [Group] => Patent [Data] => "Intermetallic Semiconductor Buffered Substrate", Research Disclosure, No. 270, 10/1986. )
Array ( [Name] => AuthorEditor [Label] => Primary Examiner [Group] => Patent [Data] => <searchLink fieldCode="ZE" term="%22Hille%2C+Rolf%22">Hille, Rolf</searchLink> )
Array ( [Name] => AuthorEditor [Label] => Assistant Examiner [Group] => Patent [Data] => <searchLink fieldCode="ZE" term="%22Tran%2C+Minhloan%22">Tran, Minhloan</searchLink> )
Array ( [Name] => AuthorCorporate [Label] => Attorney, Agent or Firm [Group] => Patent [Data] => <searchLink fieldCode="ZG" term="%22Lowe%2C+Price%2C+LeBlanc+%26+Becker%22">Lowe, Price, LeBlanc & Becker</searchLink> )
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