Dissertation/ Thesis
Design of custom ASIC for radiation experiments to study single event effects
| العنوان: | Design of custom ASIC for radiation experiments to study single event effects |
|---|---|
| المؤلفون: | Savulimedu Veeravalli, Varadan |
| المساهمون: | Steininger, Andreas, TU Wien, Österreich |
| بيانات النشر: | Wien |
| سنة النشر: | 2020 |
| المجموعة: | TU Wien: reposiTUm |
| مصطلحات موضوعية: | Radiation Tolerance, Digital Integrated Circuits, Fault Dictionary, Single Event Transients, pulse-width measurement, LFSRs, Muller Pipeline, PISOs, Probabilistic failure analysis, ASIC |
| الوصف: | Technology scaling has made the transistors increasingly susceptible to radiation particle strikes. As a consequence, particles with lower energy – which are substantially more frequent – can already cause non-destructive single event effects in CMOS circuits. Understanding them is not very straightforward, as there are so many parameters involved along with these effects, like radiation particle strikes’ strength, target circuit, path of propagation, and surrounding environment. Our goal in this thesis is to study these effects in digital CMOS circuits and aid construction of efficient radiation tolerant circuits. Firstly, the effectiveness of the existing radiation hardening techniques to particle hits in digital CMOS circuits has been mainly studied in this thesis (under a given set of environmental conditions). We explicitly analyze how the performance of two selected radiation hardening techniques, namely transistor sizing and stack separation, when exposed to particle hits varies with temperature and supply voltage. We present design aims and concepts as well as implementation results of a digital ASIC that is dedicated as a target for long-term irradiation experiments. Its sole purpose is to study susceptibility to radiation as well as propagation of radiation effects, and aid in understanding the same. The infrastructure should be able to record the SETs, in spite of the need of being tolerant to particle strikes in itself that cannot be avoided in some types of radiation experiments. The problem of devising a suitable infrastructure lies in the partly contradictory requirements, like constrained area, radiation tolerance and good resolution of the location and propagation path of particle hits. This was a major challenge in our thesis. To analyze single-event-transient (SET) sensitivity in digital CMOS circuits we propose an on-chip measurement architecture for various target circuit blocks. We also propose an architecture that allows tracing, generation and propagation of SETs in the Sklansky adder and ... |
| نوع الوثيقة: | thesis |
| وصف الملف: | xxii, 261 Seiten |
| اللغة: | English |
| Relation: | https://doi.org/10.34726/hss.2017.48221; http://hdl.handle.net/20.500.12708/5748; AC14506281; urn:nbn:at:at-ubtuw:1-105605 |
| DOI: | 10.34726/hss.2017.48221 |
| الاتاحة: | https://doi.org/10.34726/hss.2017.48221 https://hdl.handle.net/20.500.12708/5748 |
| Rights: | open |
| رقم الانضمام: | edsbas.D9E721A7 |
| قاعدة البيانات: | BASE |
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