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1Conference
المؤلفون: Schallmoser, Dominik, Lohmann, Maximilian
مصطلحات موضوعية: loose stabilization, phase clocks, population protocols, size counting, 5: Natural Sciences and Mathematics::510: Mathematics
وصف الملف: application/pdf
Relation: 43rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing, PODC 2024; Proceedings of the Annual ACM Symposium on Principles of Distributed Computing (PODC 2024); https://hdl.handle.net/11420/48663; 2-s2.0-85199095674
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2Academic Journal
المؤلفون: Gąsieniec, Leszek, Stachowiak, Grzegorz
المساهمون: Leszek Gąsieniec and Grzegorz Stachowiak
مصطلحات موضوعية: Population protocols, phase clocks, oscillators, parallel time and efficiency
وصف الملف: application/pdf
Relation: Is Part Of LIPIcs, Volume 227, 18th Scandinavian Symposium and Workshops on Algorithm Theory (SWAT 2022); https://drops.dagstuhl.de/entities/document/10.4230/LIPIcs.SWAT.2022.2
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3Academic Journal
المساهمون: Petra Berenbrink and Felix Biermeier and Christopher Hahn and Dominik Kaaser
مصطلحات موضوعية: Population Protocols, Phase Clocks, Loose Self-stabilization, Clock Synchronization, Majority, Adaptive
وصف الملف: application/pdf
Relation: Is Part Of LIPIcs, Volume 221, 1st Symposium on Algorithmic Foundations of Dynamic Networks (SAND 2022); https://drops.dagstuhl.de/entities/document/10.4230/LIPIcs.SAND.2022.7
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المساهمون: DEE2010-A2 Electrónica, CTS - Centro de Tecnologia e Sistemas, DEE - Departamento de Engenharia Electrotécnica e de Computadores, UNINOVA-Instituto de Desenvolvimento de Novas Tecnologias, RUN
مصطلحات موضوعية: Coupled Oscillators, Coupled Ring Oscillators, Multiple Phase Clocks, Multiple phase oscillators, Multiple phase ring oscillators, Oscillators, Quadrature oscillators, Ring Oscillators, Electrical and Electronic Engineering
وصف الملف: application/pdf
Relation: 9781538648810; 0271-4302; PURE: 10571051; http://www.scopus.com/inward/record.url?scp=85057120102&partnerID=8YFLogxK
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5
مصطلحات موضوعية: Population Protocols, FOS: Computer and information sciences, Clock Synchronization, Computer Science - Distributed, Parallel, and Cluster Computing, Majority, Phase Clocks, Distributed, Parallel, and Cluster Computing (cs.DC), Loose Self-stabilization, Adaptive, Theory of computation
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6Academic Journal
المؤلفون: Doina Bein, Ajoy K. Datta, Mehmet Hakan Karaata
المساهمون: The Pennsylvania State University CiteSeerX Archives
مصطلحات موضوعية: Distributed computing, fault tolerance, phase clocks, propagation of information with feedback and cleaning (PFC
وصف الملف: application/pdf
Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.104.6385; http://comjnl.oxfordjournals.org/cgi/reprint/bxl081v1.pdf
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المساهمون: DEE2010-A2 Electrónica, CTS - Centro de Tecnologia e Sistemas, DEE - Departamento de Engenharia Electrotécnica e de Computadores, UNINOVA-Instituto de Desenvolvimento de Novas Tecnologias
المصدر: Repositório Científico de Acesso Aberto de Portugal (Repositórios Cientìficos)
Agência para a Sociedade do Conhecimento (UMIC)-FCT-Sociedade da Informação
instacron:RCAAP
ISCASمصطلحات موضوعية: Multiple phase oscillators, Multiple phase clocks, Computer science, 020208 electrical & electronic engineering, Monte Carlo method, Transistor, Coupled ring oscillators, Phase (waves), 020206 networking & telecommunications, Topology (electrical circuits), 02 engineering and technology, Ring oscillator, Integrated circuit, Topology, law.invention, CMOS, Multiple phase ring oscillators, law, Ring oscillators, 0202 electrical engineering, electronic engineering, information engineering, Oscillators, Quadrature oscillators, Electrical and Electronic Engineering, Coupled oscillators, Electronic circuit
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8Academic Journal
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9
المؤلفون: Ramen Dutta, Ronan A.R. van der Zee, Bram Nauta, Xiang Gao, Eric A.M. Klumperink, Zhiyu Ru
المصدر: IEEE transactions on circuits and systems II: express briefs, 60(7), 422-426. IEEE
مصطلحات موضوعية: Engineering, IR-86547, Divider, Jitter, Hardware_PERFORMANCEANDRELIABILITY, Phase error, Low power, Electronic engineering, Hardware_INTEGRATEDCIRCUITS, Power efficiency, Current-mode logic, Timing, Electrical and Electronic Engineering, business.industry, Flip-flop design, FLOPS, Multi-Phase Clocks, Mismatch, CMOS, Transmission gate, Power consumption, Dynamic transmission gate logic, Current Mode Logic, EWI-23492, business, METIS-297722, Electrical efficiency, Hardware_LOGICDESIGN
وصف الملف: application/pdf
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المصدر: 宮崎大學工學部紀要 = Memoirs of Faculty of Engineering, University of Miyazaki. 40:111-113
مصطلحات موضوعية: Hardware_GENERAL, Hardware_INTEGRATEDCIRCUITS, Hardware_PERFORMANCEANDRELIABILITY, Three phase clocks, SC integrator, Capacitance ratio
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11Academic Journal
المؤلفون: Liao, Congwei, He, Changde, Chen, Tao, Dai, David, Chung, Smart, Jen, T. S., Zhang, Shengdong
المساهمون: Liao, CW (reprint author), Peking Univ, Shenzhen Grad Sch, Shenzhen 518055, Peoples R China., Peking Univ, Shenzhen Grad Sch, Shenzhen 518055, Peoples R China., N Univ China, Sch Elect & Comp Sci & Technol, Taiyuan 030051, Peoples R China., InfoVis Optoelect Corp Ltd, Inst Jiangsu FPD Technol & Res, Kunshan 215301, Peoples R China., Peking Univ, Inst Microelect, Beijing 100871, Peoples R China.
المصدر: SCI ; EI
مصطلحات موضوعية: Amorphous silicon, gate driver, multiple-phase clocks, thin-film transistors (TFTs), threshold-voltage shift, THIN-FILM TRANSISTORS, AMORPHOUS-SILICON TFTS, CIRCUITS, DESIGN, STRESS
Relation: IEEE TRANSACTIONS ON ELECTRON DEVICES.2012,59,(8),2142-2148.; 872422; http://hdl.handle.net/20.500.11897/232292; WOS:000306920200021
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مصطلحات موضوعية: Phase Noise, CMOS, Divider, Radio transceivers, Software Defined Radio, Jitter, Cognitive Radio, METIS-264058, Multi-Phase Clocks, IR-68295, Current Mode Logic, Shift Register, Clock Generation, Harmonic Rejection Mixer, EWI-16129, Timing Jitter, Nonlinearity, Delay Locked Loop, Key words:Cognitive radio, DLL
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المؤلفون: Eric A.M. Klumperink, Bram Nauta, Xiang Gao
المصدر: Series on Integrated Circuits and Systems ISBN: 9781402099182
Circuits and Systems for Future Generations of Wireless Communications, 145-168
STARTPAGE=145;ENDPAGE=168;TITLE=Circuits and Systems for Future Generations of Wireless Communicationsمصطلحات موضوعية: Engineering, Phase Noise, Divider, Radio transceivers, Jitter, Phase noise, Delay-locked loop, Electronic engineering, Polyphase system, Nonlinearity, Delay Locked Loop, Key words:Cognitive radio, business.industry, CMOS, Transmitter, Electrical engineering, Software Defined Radio, Cognitive Radio, Software-defined radio, METIS-264058, Multi-Phase Clocks, IR-68295, Current Mode Logic, Shift Register, Harmonic, Clock Generation, Radio frequency, Harmonic Rejection Mixer, EWI-16129, Timing Jitter, business, DLL
وصف الملف: application/octet-stream
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المؤلفون: Švehla, Dražen, Heinze, Markus
مصطلحات موضوعية: Physics::Space Physics, positioning, four GNSS, phase clocks, Astrophysics::Earth and Planetary Astrophysics, Physics::Geophysics
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15Academic Journal
المساهمون: Repositório Científico do Instituto Politécnico de Castelo Branco
مصطلحات موضوعية: Coupled oscillators, Ring oscillators, Oscillators, Multiple phase ring oscillators, Quadrature oscillators, Multiple phase oscillators, Multiple phase clocks, Coupled ring oscillators
وصف الملف: application/pdf
Relation: P. C. Pereira, A. C. Pinto, L. B. Oliveira and J. R. Fernandes, "Generic Model for Multi-Phase Ring Oscillators," 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, 2018, pp. 1-4. doi: 10.1109/ISCAS.2018.8351777; 2379-447X
الاتاحة: http://hdl.handle.net/10400.11/6289
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16Academic Journal
المؤلفون: Malagon, Eva G
المساهمون: NAVAL POSTGRADUATE SCHOOL MONTEREY CA
المصدر: DTIC AND NTIS
مصطلحات موضوعية: Computer Programming and Software, Solid State Physics, Electrical and Electronic Equipment, Computer Hardware, COMPILERS, SILICON, COMPUTER PROGRAMS, COMPLEMENTARY METAL OXIDE SEMICONDUCTORS, GALLIUM ARSENIDES, INTEGRATED CIRCUITS, CHIPS(ELECTRONICS), CELLS, SHIFT REGISTERS, ARITHMETIC UNITS, DIGITAL COMPUTERS, LOGIC CIRCUITS, THESES, CLOCKS, Cell librarie, Nimos cells, Scmos cells, MacPitts chips, Three Phase clocks, Silicon compilers, Two phase clocks, Interpreters, Caesar computer program, JAX-11-780 computers, UNIX Operating system, USP programming language
وصف الملف: text/html
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المؤلفون: 黒木, 伸一, 15707, クロキ, シンイチ, 松本, 寛樹, 11928, マツモト, ヒロキ, Matsumoto, Hiroki, Kuroki, Shinichi, 15709, Matumoto, Hiroki, 12742
مصطلحات موضوعية: Three phase clocks, SC integrator, Capacitance ratio
وصف الملف: application/pdf
Relation: 宮崎大学工学部紀要; 40; 111; 113; Memoirs of Faculty of Engineering, University of Miyazaki; AA00732558; http://hdl.handle.net/10458/3602
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18Dissertation/ Thesis
المؤلفون: 鄒伊秦, Chou, Yi-Chin
المساهمون: 陳信樹, 臺灣大學：電子工程學研究所
مصطلحات موضوعية: 多重相位產生器, 漸進式類比數位轉換器, multi-phase clocks generator, successive approximation analog-to-digital converter
وصف الملف: 3719361 bytes; application/pdf
Relation: [1] Y. Moon, J.Choi, K.Lee, D. K. Jeong, M. K. Kim, “An all-analog multiphase delay-locked loop using a replica delay line for wide-range operation and low-jitter performance,” IEEE J. Solid-State Circuits, vol. 35, no. 3, pp 377-384, March 2000. [2] D. J. Foley, and M. P. Flynn, “CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator,” IEEE J. Solid-State Circuits, vol. 36, no. 3, pp 417-423, March 2001. [3] J. Christiansen, “An integrated high resolution CMOS timing generator based on an array of delay locked loops,” IEEE J. Solid-State Circuits, vol. 31, no. 7, pp 952-957, July 1996. [4] John G. Maneatis, “Low-jitter process-independent DLL and PLL based on self-biased techniques,” IEEE J. Solid-State Circuits, vol. 31, no. 11, pp 1723-1732, Nov. 1996. [5] D. E. Brueske and S. H. Embabi, “A dynamic clock synchronization technique for large systems” IEEE TRANS. On Components, Packaging and Manufacturing Technology-Part B, vol. 17, no. 3, pp. 350-361, August 1994. [6] S. Kim, K. Lee, Y. Moon, D. K. Jeong, M. K. Kim, “A 960-Mb/s/pin interface for skew-tolerant bus using low jitter PLL,” IEEE Journal of Solid-state Circuits, vol. 32, no. 5, pp. 691-700, May 1997. [7] M. J. Lee, W. J. Dally, J. W. Poulton, P. Chiang, S. E. Greenwood, “An 84-mW 4-Gb/s clock and data recovery circuit for serial link application,” VLSI Circuits Digest of Technical Papers, 2001 Symposium on, pp. 149-152, 2001. [8] W. Rhee, “Design of high-performance CMOS charge pumps in phase-locked loops,” ISCAS Circuits and Systems, Proceedings of the 1999 IEEE International Symposium, vol. 2, pp. 545-548, 1999. [9] A. Waizman, “ A delay line loop for frequency synthesis of de-skewed clock” IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 298-299,1994. [10] J. G. Maneatis, “precise delay generation using coupled oscillators,” Ph. D. dissertation, Stanford University, June 1994. [11] Mark G. Johnson and Edwin L. Hudson, “A variable delay line PLL for CPU coprocessor synchronization,” IEEE Journal of Solid-State Circuits, vol. 23, no. 5, pp. 1218-1223, Oct. 1998. [12] Ian A. Young, “ A PLL clock generator with 5 to 110 MHz of lock range for microprocessors,” IEEE Journal of Solid-State Circuits, vol. 27, no. 11, pp. 1599-1607, Nov. 1992. [13] Hsin-Shu Chen, Bang-Sup Song,, Kantilal Bacrania, “A 14-b 20-MSamples/s CMOS Pipelined ADC,” IEEE Journal of Solid-State Circuits, vol. 36, no. 6, pp. 997-1001, June. 2001. [14] Ali Hajimiri, Thomas H. Lee,“A General Theory of Phase Noise in Electrical Oscillators” IEEE Journal of Solid-State Circuits, vol. 33, no. 2, pp 179-194, Feb. 1998. [15] B.Razavi, “ Priciples of Data Conversion System Design,” Wiley-IEEE Press,1995 [16] K. Uyttenhove, A. Marques and M. Steyaert, “A 6-bit 1 GHz Acquisition Speed CMOS Flash ADC with Digital Error Correction,” in IEEE Custom Integrated Circuits Conference, 2000. [17] Hwi-Cheol Kim“A 30mW 8b 200MS/s Pipelined CMOS ADC Using a Swichted-Opamp Technique, ISSCC Dig. Tech Paper page 284-285, Feb 2005. [18] Robert Wang; Ken Martin, David Johns, Gangadhar Burra ”A 3.3mW 12MS/s 10b Pipelined ADC in 90nm Digital CMOS”ISSCC Dig. Tech Paper page 278-279, Feb 2005. [19] B. Song, M, Tompsett, and K. Lakshmikumar, “A 12-bit 1-Msample/s capacitor error-averaging pipelined A/D converter,” IEEE J. Solid-State Circuits, vol. Sc-23, pp. 1324-1333, Dec.1998. [20] P.R. Gray and R. G. Meyer, Analysis and Design of Analog Integrated Circuits. New York: John Wiley & Sons, Inc., 1984. [21] Byung-Moo Min, Peter Kim, Frederick W. Bowman, David M. Boisvert, and Arlo J. Aude, “A 69-mW 10-bit 80-MSample/s Pipelined CMOS ADC,” IEEE J. Solid-State Circuits, vol.38, pp. 2031-12039, Dec.2003. [22] J. Doernberg, H. Lee, and D. A. Hodges, “Full-speed testing of A/D converters,” IEEE Journal of Solid-State Circuits, vol. 19,pp.820-827, Dec. 1984.; en-US; http://ntur.lib.ntu.edu.tw/handle/246246/57710; http://ntur.lib.ntu.edu.tw/bitstream/246246/57710/1/ntu-95-R93943045-1.pdf
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19Academic Journal
المؤلفون: Larrabee,Robert C
المساهمون: NAVAL POSTGRADUATE SCHOOL MONTEREY CA
المصدر: DTIC AND NTIS
مصطلحات موضوعية: Electrical and Electronic Equipment, Computer Programming and Software, Solid State Physics, INTEGRATED CIRCUITS, SILICON, LOGIC CIRCUITS, COMPILERS, ALGORITHMS, CLOCKS, THESES, GATES(CIRCUITS), ERRORS, INVERTER CIRCUITS, Macpitts chips, Three phase clocks, Nor gates, Silicon compilers and gates, VLSI(Very Large Scale Integrated Circuits), Hamming Correctors
وصف الملف: text/html
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