المؤلفون: Akhilesh Tyagi

المصدر: VLSI Design, Vol 5, Iss 2, Pp 141-153 (1997)

مصطلحات موضوعية: Very-large-scale integration, Standard cell, Adder, business.industry, statistical modeling, module generator, development environment, Statistical model, Elmore delay, Computer Graphics and Computer-Aided Design, lcsh:QA75.5-76.95, area and delay estimation, Hardware and Architecture, Bounded function, high-level synthesis, Multiplier (economics), lcsh:Electronic computers. Computer science, Electrical and Electronic Engineering, business, Synthesis system, Algorithm, Computer hardware, Mathematics

وصف الملف: text/xhtml

URL الوصول: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3ba7773fe1842f7d4d02bc75e0ddb573
https://doaj.org/article/fd001c8bd158446aa245dac0ad744c5a

المؤلفون: Andersch, M., Schardein, W., Vahrmann, R., Wedel, A., Hosticka, B.J.

مصطلحات موضوعية: analog circuit design, Analogschaltung, layout generation, module generator, Schaltungsentwurf

Time: 621

Relation: Informationstechnische Gesellschaft (Diskussionssitzung) 1994; VDE/VDI-Gesellschaft Mikroelektronik (Diskussionssitzung) 1994; Entwicklung von Analogschaltungen mit CAE-Methoden '94. 3 GME/ITG Diskussionssitzung, Schwerpunkt Bibliotheken für analoge Funktionsblöcke; https://publica.fraunhofer.de/handle/publica/323954

الاتاحة: https://publica.fraunhofer.de/handle/publica/323954

المؤلفون: Schardein, W., Andersch, M., Hosticka, B.J., Vahrmann, R., Wedel, A.

مصطلحات موضوعية: analog circuit design, Entwurf, integrierte Analogschaltung, layout, layout generator, module generator, rechnerunterstützter Schaltungsentwurf

Time: 621

Relation: European Solid State Circuits Conference 1994; ESSCIRC '94. 20th European Solid State Circuits Conference. Proceedings; https://publica.fraunhofer.de/handle/publica/322202

الاتاحة: https://publica.fraunhofer.de/handle/publica/322202

المؤلفون: Hosticka, B.J., Maas, O., Schardein, W., Tröster, G., Weghaus, B.

مصطلحات موضوعية: Addition, automatic layout generation, carry look-ahead adder, CMOS-realization, CMOS-Schaltung, CMOS-Technik, module generator, parameterizable cell, Rechnerunterstützer Schaltungsentwurf, regular layout, Systemparameter, technology independent

Time: 621

Relation: European Solid State Circuits Conference 1992; ESSCIRC '92. 18th European Solid State Circuits Conference. Proceedings; https://publica.fraunhofer.de/handle/publica/320275

الاتاحة: https://publica.fraunhofer.de/handle/publica/320275

المؤلفون: Ramji, Shyam

المصدر: Electrical Engineering and Computer Science - Dissertations

مصطلحات موضوعية: VLSI, Module generator, Datapath, Computer Sciences, Electrical and Computer Engineering, Engineering, Physical Sciences and Mathematics

Relation: https://surface.syr.edu/eecs_etd/129; http://libezproxy.syr.edu/login?url=http://proquest.umi.com/pqdweb?did=729114181&sid=1&Fmt=2&clientId=3739&RQT=309&VName=PQD

الاتاحة: https://surface.syr.edu/eecs_etd/129
http://libezproxy.syr.edu/login?url=http://proquest.umi.com/pqdweb?did=729114181&sid=1&Fmt=2&clientId=3739&RQT=309&VName=PQD

المؤلفون: Mårtensson, Per

مصطلحات موضوعية: Electronics, serie/parallell, modulgenerator, SKILL, parametriserbar, layout serial/parallel module generator, parametrizable, layout, Elektronik

وصف الملف: application/pdf

Relation: LiTH-ISY-Ex-ET, ; 0267

الاتاحة: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1981

المؤلفون: Sun, Kaihong

مصطلحات موضوعية: Electronics, Modified Booth Encoding, Low Power, Multipliers, Module Generator., Elektronik

وصف الملف: application/pdf

Relation: LiTH-ISY-Ex, ; 3315

الاتاحة: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1944

المؤلفون: Mårtensson, Per

مصطلحات موضوعية: layout, Elektronik, modulgenerator, parametrizable, layout serial/parallel module generator, serie/parallell, SKILL, Hardware_ARITHMETICANDLOGICSTRUCTURES, Electronics, parametriserbar

وصف الملف: application/pdf

URL الوصول: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::86c7714a575ec1ff82ddb8ea24732a8f
http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1981

المؤلفون: Mårtensson, Per

مصطلحات موضوعية: Electronics, serie/parallell, modulgenerator, SKILL, parametriserbar, layout serial/parallel module generator, parametrizable, layout, Elektronik

وصف الملف: application/pdf

Relation: LiTH-ISY-Ex-ET; 0267; http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1981

الاتاحة: http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1981

المؤلفون: Hedenstierna, Nils, 1959, Jeppson, Kjell, 1947

المصدر: Integration, the VLSI Journal. 5(3-4):319-336

مصطلحات موضوعية: Design Rule Checking (DRC), Module Generator, Hierarchy

URL الوصول: https://research.chalmers.se/publication/535182