المؤلفون: Qiuming Zhu, Wei Huang, Kai Mao, Weizhi Zhong, Boyu Hua, Xiaomin Chen, Zikun Zhao

المصدر: Applied Sciences; Volume 10; Issue 12; Pages: 4161

مصطلحات موضوعية: channel emulator, non-stationary MIMO channel, discrete channel model, field-programmable gate array (FPGA) platform

جغرافية الموضوع: agris

وصف الملف: application/pdf

Relation: Electrical, Electronics and Communications Engineering; https://dx.doi.org/10.3390/app10124161

الاتاحة: https://doi.org/10.3390/app10124161

المؤلفون: Guo, Wenzhe, Yantir, Hasan Erdem, Fouda, Mohamed E., Eltawil, Ahmed, Salama, Khaled N.

المساهمون: Computer, Electrical and Mathematical Science and Engineering (CEMSE) Division, Electrical and Computer Engineering, Electrical and Computer Engineering Program, Physical Science and Engineering (PSE) Division, Sensors Lab, Department of EECS, University of California-Irvine, Irvine, CA 92612 USA.

مصطلحات موضوعية: Euler method, field-programmable gate array (FPGA) platform, neuromorphic computing, on-chip learning, parallel architecture, parameter optimization, Runge-Kutta (RK) method, spiking neural network (SNN), unsupervised spike-timing-dependent plasticity (STDP) learning

وصف الملف: application/pdf

Relation: https://ieeexplore.ieee.org/document/9353400/; https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9353400; Guo, W., Yantir, H. E., Fouda, M. E., Eltawil, A. M., & Salama, K. N. (2021). Toward the Optimal Design and FPGA Implementation of Spiking Neural Networks. IEEE Transactions on Neural Networks and Learning Systems, 1–15. doi:10.1109/tnnls.2021.3055421; IEEE Transactions on Neural Networks and Learning Systems; 1-15; http://hdl.handle.net/10754/667399

الاتاحة: http://hdl.handle.net/10754/667399
https://doi.org/10.1109/TNNLS.2021.3055421

المؤلفون: Μπάρδης, Δημήτριος

Thesis Advisors: Θεοδωρίδης, Γεώργιος, Bardis, Dimitrios, Κουφοπαύλου, Οδυσσέας

مصطلحات موضوعية: Κρυπτογραφία, Συνάρτηση κατακερματισμού, Αλγόριθμος κατακερματισμού JH, Cryptography, Hash function, JH hash algorithm, VHDL language, Field Programmable Gate Array (FPGA) platform

الاتاحة: http://hdl.handle.net/10889/5288

المساهمون: Θεοδωρίδης, Γεώργιος, Bardis, Dimitrios, Κουφοπαύλου, Οδυσσέας

مصطلحات موضوعية: Συνάρτηση κατακερματισμού, Field Programmable Gate Array (FPGA) platform, Αλγόριθμος κατακερματισμού JH, VHDL language, Κρυπτογραφία, Hash function, Cryptography, JH hash algorithm

URL الوصول: https://explore.openaire.eu/search/publication?articleId=od______1047::2a57b80bfdc8075142da0c64907a77cf
http://hdl.handle.net/10889/5288