يعرض 1 - 20 نتائج من 430 نتيجة بحث عن '"Wang, Chua-Chin"', وقت الاستعلام: 0.70s تنقيح النتائج
  1. 1
    Academic Journal
    An on-chip temperature sensor with 0.5 °C resolution and 0.34% linearity error using 180-nm CMOS process

    المؤلفون: Wang, Chua-Chin, Vellanki, Pradyumna, Luo, Shih-Heng, Sangalang, Ralph Gerard B.

    المصدر: Integration ; volume 102, page 102362 ; ISSN 0167-9260

    الاتاحة: https://doi.org/10.1016/j.vlsi.2025.102362
    https://api.elsevier.com/content/article/PII:S0167926025000197?httpAccept=text/xml
    https://api.elsevier.com/content/article/PII:S0167926025000197?httpAccept=text/plain

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  2. 2
    Academic Journal
    A metastable RNG using interleaved NAND- and NOR-based TEROs.

    المؤلفون: Wang, Chua-Chin1,2 (AUTHOR) ccwang@ee.nsysu.edu.tw, Tolentino, Lean Karlo S.1 (AUTHOR), Lu, Shao-Wei1 (AUTHOR), Sangalang, Ralph Gerard B.1,3 (AUTHOR), Jose, Oliver Lexter July A.1,3 (AUTHOR), Lee, Tzung-Je1 (AUTHOR)

    المصدر: International Journal of Electronics Letters. Dec2024, Vol. 12 Issue 4, p357-374. 18p.

    مصطلحات موضوعية: *RANDOM number generators, *COMPLEMENTARY metal oxide semiconductors, *TELECOMMUNICATION systems, *CRYPTOGRAPHY, *SIGNALS & signaling, *RANDOM numbers


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  3. 3
    Conference
    Numerical Investigation on Microfluidic Integrated Side Polished Fiber to Detect Biological Analytes

    المؤلفون: Valliammai, M., Mohanraj, J., Esakki, Balasubramanian, Yang, Lung-Jieh, Wang, Chua-Chin, Rishav, Ranjan

    المصدر: 2024 International Conference on Numerical Simulation of Optoelectronic Devices (NUSOD) ; page 31-32

    الاتاحة: http://dx.doi.org/10.1109/nusod62083.2024.10723582
    http://xplorestaging.ieee.org/ielx8/10723340/10723347/10723582.pdf?arnumber=10723582

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  4. 4
    Conference
    A 54.61-GOPS 96.35-mW Digital Logic Accelerator For Underwater Object Recognition DNN Using 40-nm CMOS Process

    المؤلفون: Wang, Chua-Chin, Luo, Shih-Heng, Wu, Hsin-Che, Sangalang, Ralph Gerard B., Jou, Chewn-Pu, Hsia, Harry, Cho, Lan-Chou

    المصدر: 2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS)

    الاتاحة: http://dx.doi.org/10.1109/aicas59952.2024.10595977
    http://xplorestaging.ieee.org/ielx8/10595550/10595552/10595977.pdf?arnumber=10595977

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  5. 5
    Conference
    A 266.7 TOPS/W Computing-in Memory Using Single-Ended 6T 4-kb SRAM in 16-nm FinFET CMOS Process

    المؤلفون: Lo, Cheng-Yao, Santos Tolentino, Lean Karlo, Ke, Jhih-Ying, Walling, Jeffrey S., Yi, Yang, Wang, Chua-Chin

    المساهمون: National Science and Technology Council

    المصدر: 2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS) ; page 90-94

    الاتاحة: http://dx.doi.org/10.1109/aicas59952.2024.10595553
    http://xplorestaging.ieee.org/ielx8/10595550/10595552/10595553.pdf?arnumber=10595553

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  6. 6
    Conference
    GA-Optimized 6.0-Gbps DDR5 SDRAM I/O Buffer Design for 16-nm FinFET CMOS Process

    المؤلفون: Ke, Jhih-Ying, Santos Tolentino, Lean Karlo, Lo, Cheng-Yao, Lee, Tzung-Je, Wang, Chua-Chin

    المصدر: 2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS)

    الاتاحة: http://dx.doi.org/10.1109/aicas59952.2024.10595891
    http://xplorestaging.ieee.org/ielx8/10595550/10595552/10595891.pdf?arnumber=10595891

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  7. 7
    Conference
    A Highly Reliable XNOR-XOR-RO PUF Design for IoT Security Applications

    المؤلفون: Chen, Jian-Jie, Sangalang, Ralph Gerard B., Wu, Hsin-Che, Wang, Chua-Chin

    المصدر: 2024 IEEE 14th Symposium on Computer Applications & Industrial Electronics (ISCAIE)

    الاتاحة: http://dx.doi.org/10.1109/iscaie61308.2024.10576561
    http://xplorestaging.ieee.org/ielx8/10576198/10576206/10576561.pdf?arnumber=10576561

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  8. 8
    Conference
    A Wide Range 2-to-2048 Division Ratio Frequency Divider Using 40-nm CMOS Process

    المؤلفون: Majumder, Soumika, Kolakaluri, Venkata Naveen, Jose, Oliver Lexter July A., Wang, Chua-Chin

    المساهمون: National Science and Technology Council

    المصدر: 2024 IEEE International Symposium on Circuits and Systems (ISCAS)

    الاتاحة: http://dx.doi.org/10.1109/iscas58744.2024.10558236
    http://xplorestaging.ieee.org/ielx8/10557746/10557828/10558236.pdf?arnumber=10558236

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  9. 9
    Conference
    A 10-MHz 5-V On-chip 6-layer Multi-level Digital Transformer Using T18HVG2 Process

    المؤلفون: Jose, Oliver Lexter July A., Chang, Yun-Che, Kolakaluri, Venkata Naveen, Co, Celso B., Chou, Mitch Ming-Chi, Wang, Chua-Chin

    المساهمون: National Science and Technology Council

    المصدر: 2024 IEEE International Symposium on Circuits and Systems (ISCAS)

    الاتاحة: http://dx.doi.org/10.1109/iscas58744.2024.10558498
    http://xplorestaging.ieee.org/ielx8/10557746/10557828/10558498.pdf?arnumber=10558498

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  10. 10
    Academic Journal
    A 92.95%-efficiency high-voltage dual-mode buck converter using 0.5-µm HV CMOS process.

    المؤلفون: Wang, Chua-Chin1,2 (AUTHOR) ccwang@ee.nsysu.edu.tw, Tolentino, Lean Karlo S.1 (AUTHOR), Chen, Pin-Chuan1 (AUTHOR), Sangalang, Ralph Gerard B.1,3 (AUTHOR), Jose, Oliver Lexter July A.1,3 (AUTHOR)

    المصدر: International Journal of Electronics. Aug2024, Vol. 111 Issue 8, p1421-1440. 20p.

    مصطلحات موضوعية: *PEAK load, COMPLEMENTARY metal oxide semiconductors, PULSE frequency modulation, PULSE width modulation, HIGH voltages, PULSE width modulation transformers


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  11. 11
    Academic Journal
    A 5.4 ps resolution TDC design with anti-PVT-variation mechanism using 90-nm CMOS process.

    المؤلفون: Wang, Chua-Chin1,2 (AUTHOR) ccwang@ee.nsysu.edu.tw, Jose, Oliver Lexter July A.1 (AUTHOR), Avilala, Akhil1 (AUTHOR)

    المصدر: International Journal of Electronics. Jul2024, Vol. 111 Issue 7, p1129-1142. 14p.

    مصطلحات موضوعية: COMPLEMENTARY metal oxide semiconductors, DELAY lines, TIME-digital conversion, ON-chip charge pumps, VERNIERS, DETECTORS


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  12. 12
    Periodical
    A 6-Gbps 16-nm FinFET CMOS I/O Buffer With Variation Insensitivity Ensured by Genetic Algorithm

    المؤلفون: Wang, Chua-Chin, Chodisetti, L S S Pavan Kumar, Ke, Jhih-Ying, Lo, Cheng-Yao, Lee, Tzung-Je, Tolentino, Lean Karlo Santos

    المصدر: Circuits and Systems I: Regular Papers, IEEE Transactions on; November 2024, Vol. 71 Issue: 11 p4961-4972, 12p


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  13. 13
    Academic Journal
    Underwater Image Enhancement Based on Light Field-Guided Rendering Network.

    المؤلفون: Yeh, Chia-Hung, Lai, Yu-Wei, Lin, Yu-Yang, Chen, Mei-Juan, Wang, Chua-Chin

    المصدر: Journal of Marine Science & Engineering; Jul2024, Vol. 12 Issue 7, p1217, 12p

    مصطلحات موضوعية: CONVOLUTIONAL neural networks, UNDERWATER exploration, IMAGE intensifiers, IMAGE reconstruction, IMPERFECTION, IMAGE enhancement (Imaging systems)


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  14. 14
    Academic Journal
    A 13.73 ns Input Time Range TDA Design Based on Adjustable Current Sources Using 40-nm CMOS Process.

    المؤلفون: Wang, Chua-Chin1,2 (AUTHOR) ccwang@ee.nsysu.edu.tw, Jose, Oliver Lexter July A.1 (AUTHOR), Lin, Li1 (AUTHOR), Tolentino, Lean Karlo S.1,3 (AUTHOR), Sangalang, Ralph Gerard B.1,4 (AUTHOR), Salvador, Anela L.4 (AUTHOR)

    المصدر: Circuits, Systems & Signal Processing. Jun2024, Vol. 43 Issue 6, p3376-3395. 20p.

    مصطلحات موضوعية: *COMPLEMENTARY metal oxide semiconductors, *SUPPLY & demand, *CAPACITORS, *LOW voltage systems


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  15. 15
    Academic Journal
    A single-chip PFM-controlled LED driver with 0.5% illuminance variation

    المؤلفون: Wang, Chua-Chin, Chodisetti, L S S Pavan Kumar, Lou, Pang-Yen, Hung, Chen-Cheng-Hung, Vellanki, Pradyumna, Sangalang, Ralph Gerard B., Tolentino, Lean Karlo S., Ronquillo, Tirso A.

    المصدر: Microelectronics Journal ; volume 147, page 106167 ; ISSN 0026-2692

    الاتاحة: http://dx.doi.org/10.1016/j.mejo.2024.106167
    https://api.elsevier.com/content/article/PII:S002626922400079X?httpAccept=text/xml
    https://api.elsevier.com/content/article/PII:S002626922400079X?httpAccept=text/plain

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  16. 16
    Conference
    Using Machine Learning Techniques to Determine DDR5 SDRAM I/O Buffer’s Slew Rate at Different PVT Variations

    المؤلفون: Tolentino, Lean Karlo S., Ke, Jhih-Ying, Lo, Cheng-Yao, Wang, Chua-Chin

    المساهمون: National Science and Technology Council

    المصدر: 2023 International Conference on Integrated Intelligence and Communication Systems (ICIICS)

    الاتاحة: http://dx.doi.org/10.1109/iciics59993.2023.10421013
    http://xplorestaging.ieee.org/ielx7/10420831/10420858/10421013.pdf?arnumber=10421013

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  17. 17
    Conference
    A 2.6-GHz I/O Buffer for DDR4 & DDR5 SDRAMs in 16-nm FinFET CMOS Process

    المؤلفون: Ke, Jhih-Ying, Santos Tolentino, Lean Karlo, Lo, Cheng-Yao, Lee, Tzung-Je, Wang, Chua-Chin

    المصدر: 2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

    الاتاحة: http://dx.doi.org/10.1109/apccas60141.2023.00068
    http://xplorestaging.ieee.org/ielx7/10509846/10509868/10509932.pdf?arnumber=10509932

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  18. 18
    Academic Journal
    A 2.71 fJ/conversion-step 10-bit 50 MSPS split-capacitor array SAR ADC for FOG systems.

    المؤلفون: Wang, Chua-Chin1,2 (AUTHOR) ccwang@ee.nsysu.edu.tw, Sangalang, Ralph Gerard B.1 (AUTHOR), Wu, Meng-Jie1 (AUTHOR), Lee, Tzung-Je1 (AUTHOR), Chiu, Yi-Jen3 (AUTHOR), Tolentino, Lean Karlo S.1,4 (AUTHOR), Jose, Oliver Lexter July A.1,5 (AUTHOR)

    المصدر: International Journal of Electronics. 2023, Vol. 110 Issue 11, p1938-1956. 19p.

    مصطلحات موضوعية: COMPLEMENTARY metal oxide semiconductors, BIT rate, CAPACITORS, GYROSCOPES, FOG


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  19. 19
    Academic Journal
    A negative voltage generator with 4-stage configurable parallel switching for smart window film applications

    المؤلفون: Wang, Chua-Chin, Tolentino, Lean Karlo S., Wu, Hsin-Che, Sangalang, Ralph Gerard B., Jose, Oliver Lexter July A., Lin, Tsung-Hsien

    المساهمون: National Science and Technology Council (NSTC), Taiwan supported this study under grants NSTC

    المصدر: International Journal of Electronics Letters ; volume 11, issue 3, page 361-379 ; ISSN 2168-1724 2168-1732

    الاتاحة: http://dx.doi.org/10.1080/21681724.2023.2224067
    https://www.tandfonline.com/doi/pdf/10.1080/21681724.2023.2224067

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  20. 20
    Academic Journal
    A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process

    المؤلفون: Wang, Chua-Chin, Tolentino, Lean Karlo S., Lu, Shao-Wei, Jose, Oliver Lexter July A., Sangalang, Ralph Gerard B., Lee, Tzung-Je, Lou, Pang-Yen, Chang, Wei-Chih

    المساهمون: National Applied Research Laboratories, National Science and Technology Council

    المصدر: Integration ; volume 90, page 245-260 ; ISSN 0167-9260

    الاتاحة: http://dx.doi.org/10.1016/j.vlsi.2023.02.004
    https://api.elsevier.com/content/article/PII:S0167926023000299?httpAccept=text/xml
    https://api.elsevier.com/content/article/PII:S0167926023000299?httpAccept=text/plain

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