-
1Report
المؤلفون: P, Srivatsa, Chu, Kyle Timothy Ng, Amornpaisannon, Burin, Tavva, Yaswanth, Miriyala, Venkata Pavan Kumar, Wu, Jibin, Zhang, Malu, Li, Haizhou, Carlson, Trevor E.
مصطلحات موضوعية: Computer Science - Neural and Evolutionary Computing, Computer Science - Artificial Intelligence, Computer Science - Hardware Architecture, Computer Science - Machine Learning
URL الوصول: http://arxiv.org/abs/2006.09982
-
2
-
3Academic Journal
المؤلفون: Yu, Miao, Xiang, Tingting, P., Srivatsa, Chu, Kyle Timothy Ng, Amornpaisannon, Burin, Tavva, Yaswanth, Miriyala, Venkata Pavan Kumar, Carlson, Trevor E.
المصدر: Frontiers in Neuroscience ; volume 17 ; ISSN 1662-453X
-
4Conference
المؤلفون: Shalaby, Ahmed, Tavva, Yaswanth, Carlson, Trevor E., Peh, Li-Shiuan
المساهمون: National Research Foundation, Singapore.
المصدر: Proceedings of the 15th IEEE/ACM International Symposium on Networks-on-Chip
-
5Conference
المساهمون: School of Computer Science and Engineering (SCSE), Nanyang Technological University Singapour, Jalpaiguri Government Engineering College, Nicola Bombieri, Graziano Pravadelli, Masahiro Fujita, Todd Austin, Ricardo Reis, TC 10, WG 10.5
المصدر: IFIP Advances in Information and Communication Technology ; 26th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC) ; https://inria.hal.science/hal-02321764 ; 26th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2018, Verona, Italy. pp.128-146, ⟨10.1007/978-3-030-23425-6_7⟩
مصطلحات موضوعية: Error correcting code, BCH code, In memory computing, ReRAM, [INFO]Computer Science [cs]
Relation: hal-02321764; https://inria.hal.science/hal-02321764; https://inria.hal.science/hal-02321764/document; https://inria.hal.science/hal-02321764/file/485996_1_En_7_Chapter.pdf
-
6Academic Journal
المؤلفون: Chattopadhyay, Anupam, Lam, Kwok-Yan, Tavva, Yaswanth
المساهمون: National Research Foundation, Prime Minister’s Office, Singapore, through its Strategic Capability Research Centres Funding Initiative, Energy Research Institute (ERI@N), Nanyang Technological University, Singapore
المصدر: IEEE Transactions on Intelligent Transportation Systems ; volume 22, issue 11, page 7015-7029 ; ISSN 1524-9050 1558-0016
-
7Academic Journal
المؤلفون: Chattopadhyay, Anupam, Lam, Kwok-Yan, Tavva, Yaswanth
المساهمون: School of Computer Science and Engineering, National University of Singapore
مصطلحات موضوعية: Engineering::Computer science and engineering, Autonomous Vehicles, Security, info, archi
Relation: https://hdl.handle.net/10356/160350
الاتاحة: https://hdl.handle.net/10356/160350
-
8Academic Journal
المساهمون: School of Computer Science and Engineering
مصطلحات موضوعية: Engineering::Computer science and engineering, Memristor, ReRAM
Relation: IEEE Transactions on Computers; Bhattacharjee, D., Tavva, Y., Easwaran, A. & Chattopadhyay, A. (2020). Crossbar-constrained technology mapping for ReRAM based in-memory computing. IEEE Transactions On Computers, 69(5), 734-748. https://dx.doi.org/10.1109/TC.2020.2964671; https://hdl.handle.net/10356/154461; 2-s2.0-85083355086; 69; 734; 748
-
9Conference
المؤلفون: Vacca, Marco, Tavva, Yaswanth, Chattopadhyay, Anupam, Calimera, Andrea
المصدر: 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS) ; page 853-856
-
10
المؤلفون: Tavva Yaswanth
المساهمون: Tan Chuan Seng, School of Electrical and Electronic Engineering
مصطلحات موضوعية: Engineering::Electrical and electronic engineering [DRNTU]
وصف الملف: application/pdf
-
11
المؤلفون: Tavva Yaswanth, Aurojyoti Das
المصدر: 2015 Annual IEEE India Conference (INDICON).
مصطلحات موضوعية: Digital signal processor, Microcontroller, business.industry, Computer science, Noise (signal processing), Amplifier, Lock-in amplifier, Electronic engineering, Digital signal, business, Signal, Digital signal processing
-
12Conference
المؤلفون: Marco Vacca, Yaswanth Tavva, Anupam Chattopadhyay, Andrea Calimera
المساهمون: Vacca, Marco, Tavva, Yaswanth, Chattopadhyay, Anupam, Calimera, Andrea
مصطلحات موضوعية: Memory architecture, Logic-In-Memory, In-Memory Computing, CAM Memories
وصف الملف: ELETTRONICO
Relation: info:eu-repo/semantics/altIdentifier/isbn/978-1-5386-9562-3; info:eu-repo/semantics/altIdentifier/wos/WOS:000458965100216; ispartofbook:Titolo volume non avvalorato; IEEE International Conference on Electronics Circuits and Systems, ICECS 2018; firstpage:853; lastpage:856; numberofpages:4; http://hdl.handle.net/11583/2736315; info:eu-repo/semantics/altIdentifier/scopus/2-s2.0-85062284057; https://ieeexplore.ieee.org/document/8617879