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1Academic Journal
المؤلفون: Bacivarov, I., Bouchhima, A., Yoo, S., Jerraya, A.A.
المساهمون: Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)
المصدر: ISSN: 1741-1068.
مصطلحات موضوعية: SoC validation, SOC verification, hardware-software cosimulation, HAL simulation model, timed native execution, timing accuracy, system-on-chip, embedded systems, SOC design, PACS 85.42, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
الاتاحة: https://hal.science/hal-00105154
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2
المؤلفون: Aimen Bouchhima, Sungjoo Yoo, Ahmed Amine Jerraya, Iuliana Bacivarov
المساهمون: Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Torella, Lucie
المصدر: International Journal of Embedded Systems
International Journal of Embedded Systems, Inderscience, 2005, Volume: 1-Issue: 1/2, pp.103-111مصطلحات موضوعية: hardware-software cosimulation, Computer science, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, 02 engineering and technology, 01 natural sciences, Instruction set, system-on-chip, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, System on a chip, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, 010302 applied physics, business.industry, SOC design, timing accuracy, 020202 computer hardware & architecture, HAL simulation model, Computer architecture, SOC verification, timed native execution, Hardware and Architecture, PACS 85.42, Embedded system, Key (cryptography), embedded systems, Design cycle, business, SoC validation, Software
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3Dissertation/ Thesis
المؤلفون: 陳星諭, Chen, Shing-Yu, 陳添福, Chen, Tien-Fu
المساهمون: 資訊科學與工程研究所
مصطلحات موضوعية: 後矽驗證, 錯誤偵測, 錯誤重現, 除錯架構, SoC Validation, Error Detection, Error Reproduction, Debugging Architecture