المؤلفون: Oulee C.-S., Yang R.-J.

المساهمون: 國立臺灣科技大學電機工程系

مصطلحات موضوعية: 1.25 gb/s, Binary frequencies, Chip areas, Clock-jitter, Digital clocks, Eye diagrams, Lock time, Loop filters, Simulation results, Clocks, Mergers and acquisitions, Jitter

Relation: APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems,pp.680-683, Macao; http://ir.lib.ntust.edu.tw/handle/987654321/26859; http://ir.lib.ntust.edu.tw/bitstream/987654321/26859/-1/index.html

الاتاحة: http://ir.lib.ntust.edu.tw/handle/987654321/26859
http://ir.lib.ntust.edu.tw/bitstream/987654321/26859/-1/index.html