المؤلفون: Catalin Baetoniu, On Day

المساهمون: The Pennsylvania State University CiteSeerX Archives

المصدر: http://www.xilinx.com/support/documentation/application_notes/xapp881_V6_4X_Asynch_OverSampling.pdf.

مصطلحات موضوعية: Data at 1.25 Gb/s

وصف الملف: application/pdf

Relation: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.176.7635; http://www.xilinx.com/support/documentation/application_notes/xapp881_V6_4X_Asynch_OverSampling.pdf

الاتاحة: http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.176.7635
http://www.xilinx.com/support/documentation/application_notes/xapp881_V6_4X_Asynch_OverSampling.pdf

المؤلفون: PRESI, Marco, CIARAMELLA, ERNESTO, CORSINI, Raffaele

المساهمون: Presi, Marco, Ciaramella, Ernesto, Corsini, Raffaele

مصطلحات موضوعية: 1.25 Gb/s, Coherent receivers, Experimental demonstrations, Intensity modulations, Long reach, Polarization-independent

وصف الملف: CD-ROM

Relation: info:eu-repo/semantics/altIdentifier/isbn/978-155752993-0; ispartofbook:2014 Optical Fiber Communications Conference and Exhibition; Optical Fiber Communication Conference, OFC 2014; numberofpages:3; http://hdl.handle.net/11382/478575; info:eu-repo/semantics/altIdentifier/scopus/2-s2.0-85087600359

الاتاحة: http://hdl.handle.net/11382/478575
https://doi.org/10.1364/OFC.2014.W4G.3

المؤلفون: Chen I.-F., Yang R.-J., Liu S.-I.

المساهمون: 國立臺灣科技大學電機工程系

مصطلحات موضوعية: 1.25 Gb/s, Bit rates, Chip areas, Clock and data recovery circuit, CMOS technology, Digital clocks, Jitter performance, Latency reduction, Loop filter, Loop stability, Low speed, Peak-to-peak jitter, Phase margins, Unit intervals, CMOS integrated circuits, Jitter, Signal receivers, Digital circuits

Relation: 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009,pp.309-312, Taipei; http://ir.lib.ntust.edu.tw/handle/987654321/26768; http://ir.lib.ntust.edu.tw/bitstream/987654321/26768/-1/index.html

الاتاحة: http://ir.lib.ntust.edu.tw/handle/987654321/26768
http://ir.lib.ntust.edu.tw/bitstream/987654321/26768/-1/index.html

المؤلفون: Oulee C.-S., Yang R.-J.

المساهمون: 國立臺灣科技大學電機工程系

مصطلحات موضوعية: 1.25 gb/s, Binary frequencies, Chip areas, Clock-jitter, Digital clocks, Eye diagrams, Lock time, Loop filters, Simulation results, Clocks, Mergers and acquisitions, Jitter

Relation: APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems,pp.680-683, Macao; http://ir.lib.ntust.edu.tw/handle/987654321/26859; http://ir.lib.ntust.edu.tw/bitstream/987654321/26859/-1/index.html

الاتاحة: http://ir.lib.ntust.edu.tw/handle/987654321/26859
http://ir.lib.ntust.edu.tw/bitstream/987654321/26859/-1/index.html